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Re: [avr-chat] ATMega UART question


From: Bob Paddock
Subject: Re: [avr-chat] ATMega UART question
Date: Sun, 21 Dec 2008 07:07:11 -0500



On Sat, Dec 20, 2008 at 6:25 PM, Sid Price <address@hidden> wrote:
I am working on a design using the one UART0 on a mega164p and I am having
an issue with initialization of the UART. I notice that when I enable the TX
a byte of all zeros is transmitted. I even see this if I assert the TX
enable bit with the debugger. Is this normal? Is there a way to avoid it?

I recall running into something similar.

I don't have data sheets here in front of me to give you specific bit names.
In some of the older parts the Tx Empty bit is set by default and the bit
is Read Only.  So as soon as you enable the UART IRQ a byte is sent.
On the newer parts the bit is Read/Write so you can manipulate it
to prevent this behavior.

However I would not go with that solution.  You need to expect
that there will be bouges values on your serial line at power up
and power down.  This could be completely outside of the control of the CPU,
for example the power supply slew rate to your RS232 driver.  There could
also be random bytes at anytime due to someone walking by with a Cell Phone
or ESD events.




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