Re: [avr-chat] Expanding the ATxmega support in the toolchain

[Erik Walthinsen]

Weddington, Eric wrote:
> 1. The "architectures" that are listed in the toolchain have absolutely 
> nothing to do with the architectures or families of chips. They are just 
> convenient categories or groups to put chips in that have similar features 
> that the toolchain needs to know about.
Right, they're for things like different instruction availability,
memory sizes, etc.  I'm just not seeing any differences between the
architectures as defined in binutils except for the name.  Are there
differences buried inside gcc (which I haven't had time yet to look at)?

> 2. Let me know the exact chips you're interested in having support for, and 
> I'll take care of it for you.
Ideally all of the chips they list as available at this point:

64,128,192,256 A1
64,128,192,256 A3
16,32,64,128 A4

The peripherals are identical in each of the A lines, so the headers
should be trivial if they don't already exist, it's just specific
references to most of those combinations that seem to be missing in the
latest patches I can find.

I'm using the 16A4 in lieu of the 128A4 right now because I couldn't
easily find a source of small quantity of the right package.  A later
stage of this contract will likely involve an A1 chip.

Thanks,
      Omega
      aka Erik Walthinsen
      address@hidden