Re: [avr-chat] Missed Optimisation ?

[Michael Hennebry]

On Fri, 4 Mar 2011, Graham Davies wrote:

> Pertti Kellomäki wrote
>
> > If you think of avr-gcc primarily as a tool that maps C programs to
> > the specific chips manufactured by Atmel, then the compiler indeed has
> > complete freedom to do whatever it wants as long as the external
> > behavior of the chip (i.e. the physical pins) is in accordance with
> > the source program.
>
> That might be going a bit too far.  When debugging a program, I like to be 
> able to follow along the logic I expressed in the source code, so I would not 
> be happy if it had changed beyond all recognition.  I prefer the compiler to

This is an argument against optimization generally,
not specifically the kind under discussion.

> follow the standard except where there is no alternative but to deviate and 
> maybe a few well-documented exceptions, such as the SBI thing.
>
> > As noted, the behavior wrt. sbi probably violates the ANSI standard,
> > yet nobody gets upset because of the convenience value offered.
>
> Something else to note here is that, as far as I remember, SBI is only used 
> on special function registers that have no read side effect.  So, the same 
> knowledge of the AVR architecture that makes the use of SBI possible also 
> ensures that it is safe, even with the target object declared volatile.  To

Exactly my point: the as-if rule applies even to volatiles
when the compiler has enough information to use it.

> my mind, this is just something that should be clearly documented with one of 
> those warning icons in the margin.  In other words, I have no objection to 
> this; I was just using it as an example of how subtle the semantics of 
> volatile can be.

Why? Except for atomicity, the semantics are the same.
If anything, SBI produces even fewer surprises than RMW.

--
Michael   address@hidden
"Pessimist: The glass is half empty.
Optimist:   The glass is half full.
Engineer:   The glass is twice as big as it needs to be."