[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
RE: [avr-gcc-list] interrupt optimization
From: |
MuRaT KaRaDeNiZ |
Subject: |
RE: [avr-gcc-list] interrupt optimization |
Date: |
Sun, 5 Feb 2006 01:23:27 +0200 |
Hi David,
To save cpu time to the extreme,
I would use a timer in external event count mode, and in the interrupt service
toggle the clk pin to the event counter by sbi and cbi instructions, so
ISR(...)
{
sbi that_port, that_pin
cbi that_port, that pin
}
and may be one of this two instructions can be dropped too, there are bit
toggling registers and if the timer supports counting every toggle :)
Regards
Murat Karadeniz
http://www.onlinefavbar.com/mukas
-----Original Message-----
From: "David Bourgeois" <address@hidden>
Sent: 01.02.06 22:39:36
To: "address@hidden" <address@hidden>
Subject: [avr-gcc-list] interrupt optimization
Hi,
I have an interrupt which is called a lot of times but only really do
something very rarely:
ISR(...)
{
if (sampling-- == 0)
{
sampling = 0x7F;
callInlineFunction();
}
}
The problem is that I end up with a lot of push/pop that just eat up all
my CPU cycles most of the time. Using an inline function helped removing
all registers that were not used by the function at all (don't know why
the optimization doesn't do this already) but I still get a lot of push
not necessary by the "if" and that I would like to move before the
function call inside the "if".
What's the way to go in this situation? I thought of using a naked ISR and
adding the necessary push by inline asm but what if I later change my code
and the compiler use different registers? I'm afraid to end up with broken
code.
Thanks,
David Bourgeois
asm output of the ISR with inline function call:
334: 1f 92 push r1
336: 0f 92 push r0
338: 0f b6 in r0, 0x3f ; 63
33a: 0f 92 push r0
33c: 11 24 eor r1, r1
33e: 2f 93 push r18
340: 3f 93 push r19
342: 8f 93 push r24
344: 9f 93 push r25
346: ef 93 push r30
348: ff 93 push r31
34a: 80 91 0f 01 lds r24, 0x010F ; if
(sampling-- == 0)
34e: 81 50 subi r24, 0x01 ; 1
350: 80 93 0f 01 sts 0x010F, r24
354: 88 23 and r24, r24
356: 51 f5 brne .+84 ; 0x3ac
<__vector_16+0x78>
_______________________________________________
AVR-GCC-list mailing list
address@hidden
http://lists.nongnu.org/mailman/listinfo/avr-gcc-list
- Re: [avr-gcc-list] interrupt optimization, (continued)
RE: [avr-gcc-list] interrupt optimization, Nigel Winterbottom, 2006/02/01
Re: [avr-gcc-list] interrupt optimization, Joerg Wunsch, 2006/02/01
Re: [avr-gcc-list] interrupt optimization, David Brown, 2006/02/02
RE: [avr-gcc-list] interrupt optimization,
MuRaT KaRaDeNiZ <=
- [avr-gcc-list] avr-libc version in Latest WinAVR ?, Anton Erasmus, 2006/02/05
- Re: [avr-gcc-list] avr-libc version in Latest WinAVR ?, Joerg Wunsch, 2006/02/05
- [avr-gcc-list] Memory Size Report, Peter Harrison, 2006/02/05
- Re: [avr-gcc-list] Memory Size Report, Ned Konz, 2006/02/05
- Re: [avr-gcc-list] Memory Size Report, Peter Harrison, 2006/02/05
- Re: [avr-gcc-list] Memory Size Report, Joerg Wunsch, 2006/02/06
- Re: [avr-gcc-list] Memory Size Report, Peter Harrison, 2006/02/05
Re: [avr-gcc-list] avr-libc version in Latest WinAVR ?, Anton Erasmus, 2006/02/05