Re: [Bug gas/13215] New: ARM Cortex M3 strexh strexb instructions with same registers generates error

[Hans-Peter Nilsson]

On Tue, 20 Dec 2011, DaniBoy wrote:
>
> To solve this problem with ARM cortex m3 I changed the supplied CMSIS file
> core_cm3.c
>
> I'm now using:
> uint32_t __STREXH(uint16_t value, uint16_t *addr)
> {
>    //uint32_t result=0;
>    register uint32_t result asm ("r2");
>    __ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r"
> (value) );
>    return(result);

With the base version //-commented out and replaced with that on
the next line?  Wrong or at least suboptimal (I don't recall if
GCC is _documented_ to be free to use r2 as a _source_ operand
when it's an asm-register-declared _output_ operand as above but
I think it's free to do that).

Write "=&r" instead of "=r" to get the result in a register not
overlapping any of the source operands.

brgds, H-P