Re: [PATCH 5/5 v2 gnumach] x86_64: add 64-bit syscall entry point

[Samuel Thibault]

Luca Dariz, le jeu. 02 mars 2023 08:55:38 +0100, a ecrit:
> Il 01/03/23 21:18, Samuel Thibault ha scritto:
> > Luca Dariz, le mer. 01 mars 2023 18:40:37 +0100, a ecrit:
> > > +    asm volatile("wrmsr"
> > > +                 :
> > > +                 : "c" (regaddr), "a" (low), "d" (high)
> > > +                 : "memory"  /* wrmsr is a serializing instruction */
> > 
> > The comment could be misleading.
> > 
> > The fact that it's a serialization instruction does not *require* to
> > express it to the compiler.
> > 
> > But the fact that wrmsr needs to be a serialization instruction (because
> > it may depend on other writes etc.) means that one *also* wants to make
> > the asm snippet serialized by the compiler thanks to the memory clobber.
> > 
> > So I'd rather see:
> > 
> >                   : "memory"  /* wrmsr usage needs serialization */
> 
> The comment comes directly from the intel doc about WRMSR:
> 
> The WRMSR instruction is a serializing instruction

I'm not saying it's not a serializing instruction.

I'm saying that the compiler does not have to *care* about the
instruction being serializing.

But I'm also saying that the very reason why the instruction is
serialized is also the reason why which should give a memory clobber to
the compiler.

> The Intel 64 and IA-32 architectures define several serializing
> instructions. These instructions force the processor to complete all
> modifications to flags, registers, and memory by previous instructions and
> to drain all buffered writes to memory before the next instruction is
> fetched and executed.

Yes, and that is *completely* fine with the compiler not flushing
variables etc. to buffers before that.

But the very reason why all these flushes are done is that wrmsr can
have side effect which *requires* that to be done (e.g. structure
preparation and whatnot), and thus we should *also* tell the compiler to
do the same.

Samuel