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Re: Generating Prerequisites Automatically


From: Peter A . Kerzum
Subject: Re: Generating Prerequisites Automatically
Date: Thu, 23 Jan 2003 13:32:56 +0300

Hi, Ted

Sorry, I sent this message directly to you, not to the list.
Yes, your are partialy right, my way has several problems, I've encountered
in a short time after submitting it to the list. All inluded makefiles share
.DEFAULT rule with each other and the master makefile, so multiple
'redefined' warnings are issued during make. But it works as the last ( the
actual ) default rule in case of 'missing header' error is exactly a rule to
remake makefile that contains stale dependency.

It seems to me

> Hello Peter,
>
> I'm just another user but I subscribe to the bug-make list to keep up with
> developments.
>
> I would recommend against having any explicit rule for the dependency
> files.
>
> In fact, in my (extremely complex) makefile I prefix the include line for
> dependencies with a "-" so that MAKE does not generate an error if the file
> is not found:
>
>        # include all dependency files:
>        -include $(ALL_DEPS)

But if error is generated, it actualy exists. Just skip it is not the best
solution, it think. Note that error is stale dependency in dependency file,
not missing dependency file which is generated automatically without any
errors.

> Instead, I use a trick Paul Smith describes elsewhere, which is to create
> the dependency files concurrently with compilation.  That way, if the

Please, point me to that trick. Am I reinventing the wheel  ? =)
And my purpose is to generate dependency file only in case of real need, not
on every build. Actualy the fact, that pushed me pay close attention to make
is that I develop quite big (600 kb unpacked sources) project on quite poor
(celeron 300) machine, so even dependency generation takes about 30 seconds.

> source has been modified, the dependency file will be re-created for the
> next round. Note that many C compilers have an option to print out
> dependency information in the format that would be expected by BSD-style
> makefiles.  In my own makefiles, I take that output and process it a bit
> with perl.

Is BSD-style makefiles dependency information different from GNU makefiles
dependency information ? Anything more than
target.o: source1 source2 ...

> However for more complicated dependency generation, such as that associated
> with fortran 90, you may need a special dependency rule.  In that case, I
> would avoid having the dependency file depend on anything other than the
> source, in order to avoid exactly the problem you describe.

Yes, but problem goes far -- imagine you have source:

// foo.cc
#include "foo.h"

// foo.h
#include "bar.h"

// bar.h
// just another header

so we have dependecy generated:
#foo.P
foo.o: foo.cc foo.h bar.h

than we update project this way:
// bar.h
#include "xxx.h"

// xxx.h
// just another header

when you 'make' all is done right -- foo.o is remade

than we update project this way:
// xxx.h
...
cout << "xxx.h online\n";

but next 'make' will not remake foo.o cause make has no dependency
foo.o: xxx.h

Even if your dependency file ( foo.P in this example ) depends on .cc like
this:
foo.P: foo.cc
 or more realistic
%.P: %.cc
        $(CXX) $(CXXFLAGS) -MM $< > $@
You will fail, cause we have not touched foo.cc
So, you see -- dependency file should depend not only on primary file, but
also on all files primary file depends like this:

#foo.P
foo.o foo.P: foo.cc foo.h bar.h

The solution I've sent was exactly to this problem =)

> Ted

--

Sincerely yours
Peter Kerzum





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