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Why "*** extraneous `endef'. Stop."?


From: Tim Murphy
Subject: Why "*** extraneous `endef'. Stop."?
Date: Sun, 6 Sep 2009 14:30:45 +0100

---------- Forwarded message ----------
From: Tim Murphy <address@hidden>
Date: 2009/9/6
Subject: Re: Why "*** extraneous `endef'. Stop."?
To: address@hidden


Oh dear - sorry - I'm an idiot.

All I can say is that the ifneq statement is what makes it go wrong
for me.  Using $(if works for me but to get the same effect as "not
equal" you need to do some complicated stuff.

It is a bug.  I can only suggest a workaround:

define equal
$(if $(1:$2=),,$(if $(2:$1=),1))
endef

define Var1
$(if $(call equal,1,1),,
define Var2
define Var3
endef
endef
)
endef


Cheers,

Tim

2009/9/6 Alfred M. Szmidt <address@hidden>:
>   define starts a macro.  Everything from the start of the macro to
>   endef is just text and is not evaluated.
>
>   So your inner "define" is not recognised - it's just treated as
>   text.  That means that the dirst endef matches the first define and
>   all the other endefs seem to have no corresponding define
>   statement.
>
>   In other words, you cannot nest defines like that.
>
> Sure you can, it is a documented feature.  From the GNU make manual,
> (make) Defining:
>
> |    You may nest `define' directives: `make' will keep track of
> | nested directives and report an error if they are not all properly
> | closed with `endef'.  Note that lines beginning with tab characters
> | are considered part of a command script, so any `define' or `endef'
> | strings appearing on such a line will not be considered `make'
> | operators.
>
> This is more a bug than anything.
>



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