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Re: [PATCH] Add riscv-sim.exp
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From: |
Rob Savoye |
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Subject: |
Re: [PATCH] Add riscv-sim.exp |
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Date: |
Mon, 20 Jul 2020 18:23:28 -0600 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 |
On 7/20/20 5:23 PM, Jacob Bachmeyer wrote:
> Do I correctly infer that this patch works with the sim tool shipped
> with GDB?
That's the default instruction set level simulator, often used when
working hardware is unavailable. QEMU does have riscv support, so the
new baseboard for generic QEMU support should work too. I haven't tried
it yet though. I have looked at the new file, it's not that different
from all the other *-sim.exp files, so should make the next release.
- rob -
- [PATCH] Add riscv-sim.exp, Kito Cheng, 2020/07/14
- Re: [PATCH] Add riscv-sim.exp, Jacob Bachmeyer, 2020/07/20
- Re: [PATCH] Add riscv-sim.exp,
Rob Savoye <=
- Re: [PATCH] Add riscv-sim.exp, Kito Cheng, 2020/07/20
- Re: [PATCH] Add riscv-sim.exp, Rob Savoye, 2020/07/20
- Re: [PATCH] Add riscv-sim.exp, Tom Tromey, 2020/07/21
- Re: [PATCH] Add riscv-sim.exp, Kito Cheng, 2020/07/22
- Re: [PATCH] Add riscv-sim.exp, Rob Savoye, 2020/07/22
- Re: [PATCH] Add riscv-sim.exp, Joel Sherrill, 2020/07/22
- Re: [PATCH] Add riscv-sim.exp, Tom Tromey, 2020/07/22
- Re: [PATCH] Add riscv-sim.exp, Rob Savoye, 2020/07/23
- Re: [PATCH] Add riscv-sim.exp, Kito Cheng, 2020/07/20