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Question about layers in Electric


From: Matt McCullough
Subject: Question about layers in Electric
Date: Mon, 27 Jun 2011 13:54:03 -0600

Hi,

I am currently working on several layouts that involve enclosed-layout transistors and guard rings. I was trying to put a p-doped ring around the n-channel transistors, however, the tool places an n-well around the p-active layer when I place it. I was wondering if there was a way to use the p-active layer without the n-well being automatically placed around it. I was also unsure of the difference between "p-active nodes" and "p-active-well-nodes" in the mocmos technology. If anyone could help, I would really appreciate it.

Thanks,
Matt

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