Re: [Discuss-gnuradio] Reducing the ADC sample rate

[Eric Blossom]

On Mon, Nov 14, 2005 at 06:17:16PM -0500, address@hidden wrote:
> On Fri, 11 Nov 2005 11:42:18 -0800, Eric responded:
> 
> I just saw that in the schematic that the AD9862 gets its clock dirrectly
> from the VCTCXO.  
> 
> Is there any other way to decrease the sample rate beside the decim_rate?

The ADCs always run at the oscillator rate (low jitter).

decim_rate sets how much decimation is done in the FPGA.  You can of
course perform additional decimation in software.  You'd probably want
to use gr.fir_filter_ccf for that job.  The first argument is the
decimation rate.

Eric