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From: | Brian Padalino |
Subject: | Re: [Discuss-gnuradio] Fewer than 8 bits per sample FPGA support |
Date: | Tue, 6 Mar 2007 11:50:36 -0500 |
On 3/6/07, Brian Padalino <address@hidden> wrote:
It looks like you possibly have multiple sources on your signals which conflict with each other. Only one process can assign to a wire.
I take back my previous statement. A quick simulation of the main module shows no contention. Here is a screen shot using ModelSim. Brian
bit_pack_sim.PNG
Description: PNG image
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