Re: [Discuss-gnuradio] usrp_n200_r3_fpga.bin build error

[Ian Buckley]

Correct, all the build products for N series USRP's are prefixed "u2plus" when 
they are generated directly via ISE, the name of the build directory identifies 
the specific hardware they are built for.

On May 1, 2013, at 1:27 PM, "Rahman, Muhammad Mahboob Ur" <address@hidden> 
wrote:

> Hi Ian,
> 
> I have tried to build using 14.4; it took me about 40 minutes but eventually 
> the process finished gracefully. So, we will stick to 14.4 for the time being.
> 
> Now, I can see u2plus.bin file in /build-N200R3. I hope this is the intended 
> file; i.e., it is equivalent to pre-compiled usrp_n200_fpga_r3.bin file. 
> Right?
> 
> 
> Thanks,
> Mahboob
> ________________________________________
> From: Ian Buckley address@hidden
> Sent: 01 May 2013 11:01
> To: Rahman, Muhammad Mahboob Ur
> Cc: Ian Buckley; address@hidden forum; address@hidden list
> Subject: Re: [Discuss-gnuradio] usrp_n200_r3_fpga.bin build error
> 
> OK, if you have yet to change any files from the default and that is the 
> result of a build then I strongly suspect the ISE version.
> 2013.1 has not been used to try to build any of the USRP databases yet.
> 2012.4 (14.4) is known to work for N200, and production images for N200 as 
> supplied by Ettus are still built using ISE12.1.
> I'll load 2013.1 later today and see if I can reproduce your problems.
> 
> 
> On May 1, 2013, at 8:08 AM, "Rahman, Muhammad Mahboob Ur" <address@hidden> 
> wrote:
> 
>> Hi Ian,
>> 
>> 
>>> USRP specific questions (especially FPGA/Hardware) are best directed
>>> at the USRP mailing list, rather than the GNURadio one.
>> 
>> You are right in your suggestion :)
>> 
>>> It's hard to say exactly what has caused this error, but basically it;s
>>> failing to identify the module name that is the root/top of the FPGA 
>>> hierarchy.
>>> I'm curious to know if the following lines are present in 
>>> "build-N200R3/u2plus.xise" :
>>> <property xil_pn:name="Implementation Top" xil_pn:value="Module|u2plus" 
>>> xil_pn:valueState="non-default"/>
>>>  <property xil_pn:name="Implementation Top File" xil_pn:value="../u2plus.v" 
>>> xil_pn:valueState="non-default"/>
>>> <property xil_pn:name="Implementation Top Instance Path" 
>>> xil_pn:value="/u2plus" xil_pn:valueState="non-default"/>
>> 
>> Not exactly, but this is what I see inside u2plus.xise file:
>> <property xil_pn:name="Implementation Top" xil_pn:value="" 
>> xil_pn:valueState="default"/>
>> <property xil_pn:name="Implementation Top Instance Path" xil_pn:value="" 
>> xil_pn:valueState="default"/>
>> 
>> So should I edit it by hand to match what we expect?
>> 
>>> To help further more information will be needed:
>>> * What files in the design have you touched to make your changes
>> 
>> None. But I will do some changes in u2plus_core.v in future.
>> 
>>> * Have you been running ISE in a the gui mode on this project or altered 
>>> Makefiles or scripts.
>> 
>> No.
>> 
>>> * What version of ISE are you using
>> 
>> 2013.1
>> 
>>> * Detailed log file of your attempt to compile (make -f Makefile.N200R3 bin 
>>> 2>&1 | tee build.log)
>> 
>> See attached.
>> 
>>> As a sanity check it might be wise to prove that you can compile
>>> an un-altered version of the FPGA using the same command line first.
>> 
>> This is what I am currently doing.
>> 
>> 
>> 
>> Thanks,
>> Mahboob
>> <build.log>_______________________________________________
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>