Re: [Discuss-gnuradio] GRAS build error on armv7

[Manoj Gudi]

There is no equivalent instruction of pause in ARM that hints the following loop is a spin-lock loop; However I just mapped pause into NOP and its not throwing an error (yet)  :D

Here's the diff:

diff --git a/Include/Theron/Detail/Threading/Utils.h b/Include/Theron/Detail/Threading/Utils.h
index 8c6baf2..76947c7 100644
--- a/Include/Theron/Detail/Threading/Utils.h
+++ b/Include/Theron/Detail/Threading/Utils.h
@@ -168,8 +168,12 @@ THERON_FORCEINLINE void Utils::YieldToHyperthread()
     YieldProcessor();
 
 #elif THERON_GCC
+       #ifdef __arm__
+       __asm__ __volatile__ ("NOP");
+       #else
+       __asm__ __volatile__("pause");
+       #endif
 
-    __asm__ __volatile__ ("pause");
 
 #endif

Can anybody comment on performance degradation?

On Sun, Jul 28, 2013 at 8:37 PM, Ashton Mason <address@hidden> wrote:

Thanks Manoj!

On 27 July 2013 05:16, Manoj Gudi <address@hidden> wrote:

Yes I'll work on it and send you a patch with conditional preprocessors.

On Sat, Jul 27, 2013 at 3:06 AM, Ashton Mason <address@hidden> wrote:

Hi guys

Yes that line is no doubt the culprit; The 'pause' is intended to help prevent a spinning thread from burning a core that could be used instead by another thread (or hyperthread). I'm not sure what the equivalent is on ARM processors (if any).

Certainly commenting it out is one easy way around it; the #ifdef __X86_64__ seems reasonable; there might even be an ARM equivalent we could conditionally use instead.

Ash

On 26 July 2013 20:29, Josh Blum <address@hidden> wrote:

On 07/26/2013 07:57 AM, Manoj Gudi wrote:
> We've been successful in building dependencies for gnuradio on armv7
> platform, however while building GRAS, we got this error:
>

This line is probably the culprit.
https://github.com/captaintrash/theron/blob/master/Include/Theron/Detail/Threading/Utils.h#L163

The thread pools can operate on condition variables or spin locks. For
the spin lock implementation, there is a "pause" instruction --
obviously not applicable on arm. I think you can simply comment this out
to get things rolling.

Supposing this is the issue. What is the recommended fix... just a
simple #ifdef __X86_64__ around this line?

-josh

> *Scanning dependencies of target gras
> [ 13%] Building CXX object
> lib/CMakeFiles/gras.dir/__/Theron/Theron/Receiver.cpp.o
> [ 13%] Generating GrExtras_Ops.pyc
> [ 13%] Generating GrExtras_Ops.pyo
> make[2]: warning:  Clock skew detected.  Your build may be incomplete.
> [ 13%] Built target pygen_python_grextras_da046
> [ 13%] Swig source
> /tmp/ccONtg2w.s: Assembler messages:
> /tmp/ccONtg2w.s:3234: Error: bad instruction `pause'
> /tmp/ccONtg2w.s:3243: Error: bad instruction `pause'
> /tmp/ccONtg2w.s:3266: Error: bad instruction `pause'
> /tmp/ccONtg2w.s:3275: Error: bad instruction `pause'
> /tmp/ccONtg2w.s:3406: Error: bad instruction `pause'
> /tmp/ccONtg2w.s:3415: Error: bad instruction `pause'
> /tmp/ccONtg2w.s:4479: Error: bad instruction `pause'
> /tmp/ccONtg2w.s:4488: Error: bad instruction `pause'
> /tmp/ccONtg2w.s:4511: Error: bad instruction `pause'
> /tmp/ccONtg2w.s:4520: Error: bad instruction `pause'
> /tmp/ccONtg2w.s:4540: Error: bad instruction `pause'
> /tmp/ccONtg2w.s:4549: Error: bad instruction `pause'
> /tmp/ccONtg2w.s:4677: Error: bad instruction `pause'
> /tmp/ccONtg2w.s:4686: Error: bad instruction `pause'
> /tmp/ccONtg2w.s:4735: Error: bad instruction `pause'
> /tmp/ccONtg2w.s:4744: Error: bad instruction `pause'
> /tmp/ccONtg2w.s:4816: Error: bad instruction `pause'
> /tmp/ccONtg2w.s:4825: Error: bad instruction `pause'
> make[2]: Warning: File `/usr/include/python2.7/Python.h' has modification
> time 4.1e+08 s in the future
> [ 13%] Building CXX object
> PMC/python/PMC/CMakeFiles/_PMCBool.dir/PMCBoolPYTHON_wrap.cxx.o
> /home/aakash/gras/build/PMC/python/PMC/PMCBoolPYTHON_wrap.cxx: In function
> 'void SWIG_InitializeModule(void*)':
> /home/aakash/gras/build/PMC/python/PMC/PMCBoolPYTHON_wrap.cxx:3433:21:
> warning: statement has no effect [-Wunused-value]
> *
>
> In my opinion this is an assembler issue for armV7, but I've got no leads
> on how to solve this. Will mapping this instruction with an equivalent
> assembly instruction for armV7 work?
>
> Here's /proc/cpuinfo
> *$ cat /proc/cpuinfo
> Processor       : ARMv7 Processor rev 2 (v7l)
> BogoMIPS        : 1001.88
> Features        : swp half thumb fastmult vfp edsp neon vfpv3
> CPU implementer : 0x41
> CPU architecture: 7
> CPU variant     : 0x3
> CPU part        : 0xc08
> CPU revision    : 2
>
> Hardware        : sun5i
> Revision        : 0000
> Serial          : 0000000000000000
> *
> OS version: Linaro image 13.06
> Kernel: linux-sunxi 3.0.62+
>