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From: | Laura Huddleston |
Subject: | Re: [Discuss-gnuradio] Ettus E310 sample rate |
Date: | Mon, 14 May 2018 14:57:19 +0000 |
So just to clarify, I would need to program the FPGA explicitly if I want to achieve a sample rate of higher than 8MS/s?
~~~~~~~~~~~~~~~~~~~~~ Laura Huddleston From: Derek Kozel <address@hidden>
Hello Laura, The ADCs and DACs do support running at 61.44 MS/s. However the ARM processor is not able to handle data traffic at that rate so some of the processing must be done in the FPGA. Depending on the application
about 10 MS/s is an achievable rate. Both 12 MS/s and 8 MS/s are not integer divisors of 61.44 MHz so the ADC rate is being changed behind the scenes to support those rates, probably to 16 or 32 MHz. You can explicitly set that by adding an argument
to the benchmark_rate or similar utility. Regards, Derek On Fri, May 11, 2018 at 7:37 PM, Laura Huddleston <address@hidden> wrote:
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