discuss-gnuradio
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Discuss-gnuradio] GNU Radio Convolutional Decoder Node Synchronization


From: Moses Browne Mwakyanjala
Subject: [Discuss-gnuradio] GNU Radio Convolutional Decoder Node Synchronization
Date: Mon, 13 May 2019 16:56:51 +0200

I'm trying to perform node synchronization for the standard CCSDS convolutional code, CC(7,1/2), [79,109]. Generally, CCSDS telemetry data consist of a contiguous trail of channel access data unit (CADU)s as shown below. A CADU consists of attached sync marker (ASM) and the payload
image.png
The ASM is generally used for frame synchronization as well as phase ambiguity resolution. Using one of the standard ASM patterns, say 0x1ACFFC1D, equivalent to a 32 binary pattern "00011010110011111111110000011101", could result in a 52-bit repeating pattern after a convolutional encoder. I'm using this to synchronize my the async Viterbi decoder as shown in the flowgraph below. 
Given my message size of 501 bytes (4008 bits) plus 32 bits of the sync word, the convolutional encoder produces 8080 bits per input frame. The synchronizer block (synchronizeCADUSoft) detects the 52-bit sync and adds a tag. The size of the tagged frame is thus 8080 - 12 = 8068 bits, effectively discarding the 12 initial bits (equivalently the first 6 bits of the sync word). Now, the recoverCADUSoft  block retrieves a frame of size 8068 - 52 = 8016 bits = 2 x Original frame size. The PDU chunk from the recoverCADUSoft  block is passed to the FEC Async Decoder for Viterbi decoding. The decoder object is configured as follows:
Frame bits: 8016
Start state: 29 (The binary pattern 011101, which forms the tail of the 32-bit ASM pattern)
End state:6 (The binary pattern 000110, which forms the head of the 32-bit ASM pattern).
Mode: Tailbiting

The SNR value is pretty high so the BER should be zero, unlike what is shown below by the running BER values. The 2nd  line suggests that there were no errors, the 3rd line shows that there were 2024 errors, the 4th line shows only 3 bits were in error, etc. I don't understand if  the problem is with my overall concept or the configuration of the FEC Async Decoder and CC Decoder Definition blocks, or both for that matter. 
All pieces of advice are highly welcomed.  
Regards,
Moses. 

NBits: 4008 NErrs: 2022 BER: 5.0449E-01
NBits: 8016 NErrs: 2022 BER: 2.5225E-01
NBits: 12024 NErrs: 4046 BER: 3.3649E-01
NBits: 16032 NErrs: 4049 BER: 2.5256E-01
NBits: 20040 NErrs: 6070 BER: 3.0289E-01
NBits: 24048 NErrs: 6073 BER: 2.5254E-01
 

image.png

reply via email to

[Prev in Thread] Current Thread [Next in Thread]