Re: Is there anything about USRP blocks that breaks them within hier blocks?

[Marcus D. Leech]

On 12/03/2019 09:40 PM, Lukas Haase wrote:
> Hi,
>
> Am I not supposed to put USRP blocks within a hierarchichal block and if so, 
> why?
>
> Very strange minimal example (Ettus USRP X310, Windows 10, gnuradio 3.7.13.5):
>
> https://paste.pics/8a1cf2b2661fab2bc71b760e369997b9
>
> Works and with a spectrum analyzer I see the tone at 916 MHz.
>
> Then I do nothing more than putting the Signal Source and USRP Sink into a hier 
> block and using it:
>
> https://paste.pics/8c7c200035a083e218625360defc8015
>
> https://paste.pics/bcd7969f3299f54e56b0d3ca210d97af
>
> It's hard to believe but true: The spectrum analyzer stays silent! It doesn't 
> output anything.
>
> All messages on the console are same as well: The FPGA image gets loaded onto 
> the USRP and it starts.
> For a brief moment at startup, the spectrum analyzer shows a small tone at 
> 916MHz which disappears again.
>
>
> Thanks,
> Luke
Your gain is 0, that might have some bearing.   Also, you should see the 
main tone at 915M, because your baseband signal is at -1M.