Build target everytime when make

[Dannoy Lee]

Hi,
   In the following Makefile,I want make a.c rebuild everytime I type make
command by using FORCE as a prerequisite of a.c

all:a.d a.o
        touch $@

-include a.d

a.c:FORCE
        touch $@
%.d:%.c
        echo $*.o $*.d : $*.c > $*.d

%.o:%.c
        touch $@

FORCE:
.PHONY:FORCE

But it will ouputs

touch a.c
echo a.o a.d : a.c > a.d
touch a.c
echo a.o a.d : a.c > a.d
touch a.c
echo a.o a.d : a.c > a.d
touch a.c

And It cannot stop.

So I change the previous Makefile as follows:
all:a.d a.o
        touch $@

-include a.d

a.c:
        touch $@
%.d:%.c
        echo $*.o $*.d : $*.c > $*.d

%.o:%.c
        touch $@

.INTERMEDIATE:a.c

FORCE:
.PHONY:FORCE
When I run make the first time,it outputs:
touch a.c
echo a.o a.d : a.c > a.d
rm a.c
touch a.c
touch a.o
touch all
rm a.c
When I run make again,it outputs:
make: `all' is up to date.
So I run it with -d,and I noticed the following ouput:
Updating goal targets....
Considering target file `all'.
  Pruning file `a.d'.
  Considering target file `a.o'.
   Looking for an implicit rule for `a.o'.
   Trying pattern rule with stem `a'.
   Trying implicit prerequisite `a.c'.
   Found an implicit rule for `a.o'.
   Finished prerequisites of target file `a.o'.
   Prerequisite `a.c' of target `a.o' does not exist.
   Prerequisite `a.c' of target `a.o' does not exist.
  No need to remake target `a.o'.
 Finished prerequisites of target file `all'.
 Prerequisite `a.d' is older than target `all'.
 Prerequisite `a.o' is older than target `all'.
No need to remake target `all'.
make: `all' is up to date.

My questions are:
1.why remove a.c before taget all is built,so rebuild a.c twice when I run
make the first time
2.why a.c doesn't rebuild when make knows 'a.c' doesn't exit

Thanks in advance.



-- 
Dannoy.Lee