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Re: Append dependencies through variables
From: |
Paul Smith |
Subject: |
Re: Append dependencies through variables |
Date: |
Sun, 26 May 2013 15:26:15 -0400 |
On Sun, 2013-05-26 at 19:49 +0200, Riccardo Manfrin wrote:
> You are absolutely right, I actually had my includes *after* the "all:"
> target, in order to have the make process find the "all" target before
> the others.
If you're just doing this to ensure that "all:" is the first target
defined, there are other ways to do this.
> > Rule targets and prerequisites are expanded immediately when the
> > makefile is parsed, so changes to variables after they appear in targets
> > and prerequisites are not reflected there.
> Ok, so is there a way to force a prerequisite to be expanded *after* the
> variable it is made of has been evaluated throughout the whole makefile?
No, not via standard make operations.
> I've been reading the documentation and aldready tried with
> ".SECONDEXPANSION" but could not find the proper way to use it.
You can do it with secondexpansion, like this:
.SECONDEXPANSION:
all: $$(MAKE_DEPS_ALL)
Note that enabling SECONDEXPANSION inflicts a performance penalty on
make. It's probably not overly noticeable, unless you have a very large
build system.