RE: Indirection Operators in the Command section of a makefile doesnt work.

[Rakesh Sharma]

Hello David,

 

Thanks for helping me out with the heredoc operator inside a makefile.

 

You are right , in that  it's not a good idea to use the heredoc in a makefile.

 

Your suggestions for the stackoverflow link gave me the way out of my imbroglio.

 

I have now modified my way to first define a multiline env variable from a csh 
file, then invoke the make from  this csh file,

finally use the $$multiline variable in the makefile , since it's now visible 
to the make by virtue of importing the environment.

 

Regards,

Rakesh

Sharma


 

> Date: Fri, 17 Jan 2014 18:53:39 +1100
> Subject: Re: Indirection Operators in the Command section of a makefile 
> doesnt work.
> From: address@hidden
> To: address@hidden
> 
> On 17 January 2014 00:59, Rakesh Sharma <address@hidden> wrote:
> >
> > Is it possible to use the shell indirection operator (<<) inside the 
> > command section of GNU Make?
> 
> Why are you doing this? What is your goal?
> There might be better ways to achieve your goal than using the << operator.
> 
> It is better if you tell us what your goal is, so we can advise the
> best way to achieve it.
> Otherwise we have to guess what your goal is because you did not state it.
> This is called an XY Question. Please read the top couple of paragraphs here:
> http://mywiki.wooledge.org/XyProblem
> You are asking about Y, and not telling us what X is.
> 
> If (I guess that) you are trying to output multiline text from your makefile
> then you might find an answer here:
> http://stackoverflow.com/questions/649246/is-it-possible-to-create-a-multi-line-string-variable-in-a-makefile
> 
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