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Re: [lwip-users] Port to 8086 Architecture.


From: David Empson
Subject: Re: [lwip-users] Port to 8086 Architecture.
Date: Mon, 19 Feb 2007 11:37:35 +1300

On Saturday, February 17, 2007 3:55 AM, "Kieran Mansley" <address@hidden> wrote:
On Fri, 2007-02-16 at 09:49 -0500, Robert Morse wrote:
What I had to do was in the one section where the address compare in
the pbuf_header() routine.  I had to change the if to call a function
that created a linear address from the segment/offset then compare those
address.

It's not entirely clear from this what change you made, and whether it
is more widely applicable.  Could you supply a diff?

The 8086 and 80186 address memory using a 16-bit segment and 16-bit offset. (This also applies to "real mode" in later 80x86 processors.) The segment is multiplied by 16 to determine the physical memory address of a particular "paragraph", then the offset is added. A segment by itself can be used as the base address of a 64 KB memory area, but any address which is a multiple of 16 within that area can be the start of a new segment, so segments can overlap, and multiple combinations of segment and offset can refer to the same memory location.

This means it is difficult to compare 32-bit pointers unless they are first "normalised", by shifting and adding the segment and offset to form a 20-bit linear address. If the normalised pointer needs to be used as a memory address again, it is split back into a 4-bit segment and 16-bit offset (X000:XXXX), or 16-bit segment and 4-bit offset (XXXX:000X).

Some x86 compilers have a memory model where this is done automatically (it was called the "huge" model in Borland C++ back when I last used it). As long as specific comparisons can be isolated and coded correctly, it is more efficient to use the "large" model, which doesn't automatically normalise pointers but still allows more than 64 KB to be addressed as long as any single data structure doesn't exceed 64 KB.

Any code to deal with normalising pointers in LWIP would have to be conditional on an 80x86 processor so I doubt it would be useful for other processor families.




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