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Re: [lwip-users] UDP bind error due to address and port reuse


From: Surya Chaitanya
Subject: Re: [lwip-users] UDP bind error due to address and port reuse
Date: Wed, 7 Dec 2016 16:02:39 +0530

Hi,

There are 5 different applications running on 5 different port numbers 
respectively 
on the PC. That's why we are using 5 different ports on destination side. 
Moreover, 
the PC-side implementation is not in our control. It is being implemented by a 
different team and there are some headers above UDP to distinguish the packets.

We are using RAW_API to send the UDP packets. 

So now, as mentioned earlier, from the FPGA board, we are using one port 
number(say 
x) to send to 5 different port numbers(say a,b,c,d,e) on the PC. And we would 
like 
to receive UDP packets from (a,b,c,d,e) ports - all onto the port 'x' on the 
FPGA 
board. 

So to achieve this, can I do it on a single PCB and listen to all the ports 
a,b,c,d,e on a single port 'x' on the FPGA board or do I have to create 5 PCBs, 
each 
of them individually listening to a single port on the PC? Thank you.

Regards,
Surya

On Wed, 7 Dec 2016 09:45:48 +0000, Noam Weissman wrote
> Hi,
> 
> I do not understand the logic in your design. If you send data to one IP why 
> use 5 different ports ? Either send some header that differentiate the 5 
> messages and in one receive function filter them to different recipient ?
> 
> As for your question:
> First of all you listen on one single port, meaning you bind IP+port to one 
> PCB.
> 
> Secondly when you send data you use udp_sendto (RAW API) or similar if you 
> use 
> Netconn or Socket API
> 
> The udp_sendto  function accepts IP and port:
>       err_t udp_sendto(struct udp_pcb *pcb, struct pbuf *p,  ip_addr_t 
> *dst_ip,
>  u16_t dst_port)
> 
> As for reply UDP packets from remote you better add some data in the reply 
> that will give you the correlation with the data sent.
> 
> Hope that helped.
> 
> BR,
> Noam.
> 
> -----Original Message-----
> From: Surya Chaitanya [mailto:address@hidden 
> Sent: Wednesday, December 07, 2016 10:53 AM
> To: Mailing list for lwIP users
> Cc: Noam Weissman; address@hidden; address@hidden
> Subject: Re: [lwip-users] UDP bind error due to address and port reuse
> 
> Hi Noam,
> 
> Our situation is something like this:
> 
> We have a Xilinx FPGA board. From one source port on the board, we would like 
> to send 5 UDP request packets to 5 different destination port numbers on a 
> PC. 
> And, we would also like to receive 5 response packets, one from each of the 5 
> ports on the PC to the single port on the FPGA board. Please let us know how 
> to achieve this using the lwIP stack. Thank You.
> 
> Regards,
> Surya
> 
> On Sat, 3 Dec 2016 12:56:52 +0000, Noam Weissman wrote
> > Hi,
> > 
> > If I understand you correctly you are trying to bind IP:port several 
> > times on the same machine
> > 
> > without closing the previous bind ?
> > 
> > This is not an option. You can bind UDP and TCP separately with two 
> > different pcb's one for
> > 
> > TCP and one for UDP.
> > 
> > You cannot bind an IP:Port more then one time. This is the meaning of 
> > binding.
> > 
> > Its like a marriage between IP and a Port. Until you do not divorce 
> > you cannot marry again [UTF-8?][UTF-8?][😊]
> > 
> > BR,
> > 
> > Noam.
> > 
> > ________________________________
> > From: lwip-users <address@hidden> on 
> > behalf of Surya Chaitanya <address@hidden>
>  Sent: Saturday, December 3, 2016 10:44 AM
> 
> > To: address@hidden
>  Subject: [lwip-users] UDP bind error due to address 
> > and port reuse
> > 
> > Hi,
> > 
> > I've been trying to use lwip to transfer UDP packets. In my situation, 
> > in the client
>  application, I would like to create 5 UDP PCBs having the same IP 
> > address and port
>  number. Inspite of setting the SO_REUSE flag to 1, and 
> > setting the SOF_REUSEADDR flag
>  to 1 for all the PCBs, the UDP bind error 
> > still persists. Could somebody pls. help me
>  out? Thank You.
> > 
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The 
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