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Re: [PULL 00/14] aspeed queue
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [PULL 00/14] aspeed queue |
Date: |
Tue, 14 Sep 2021 13:38:50 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 |
On 9/14/21 12:58 PM, Cédric Le Goater wrote:
> On 9/14/21 12:51 PM, Peter Maydell wrote:
>> On Mon, 13 Sept 2021 at 17:13, Cédric Le Goater <clg@kaod.org> wrote:
>>>
>>> The following changes since commit eae587e8e3694b1aceab23239493fb4c7e1a80f5:
>>>
>>> Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-09-13'
>>> into staging (2021-09-13 11:00:30 +0100)
>>>
>>> are available in the Git repository at:
>>>
>>> https://github.com/legoater/qemu/ tags/pull-aspeed-20210913
>>>
>>> for you to fetch changes up to d7add12e20fa8982f5932ff4dca317c5d2dfe7d9:
>>>
>>> hw/arm/aspeed: Add Fuji machine type (2021-09-13 15:19:20 +0200)
>>>
>>> ----------------------------------------------------------------
>>> Aspeed patches :
>>>
>>> * MAC enablement fixes (Guenter)
>>> * Watchdog and pca9552 fixes (Andrew)
>>> * GPIO fixes (Joel)
>>> * AST2600A3 SoC and DPS310 models (Joel)
>>> * New Fuji BMC machine (Peter)
>>
>> Hi; this fails 'make check' on 32-bit hosts:
>>
>> qemu-system-aarch64: at most 2047 MB RAM can be simulated
>> Broken pipe
>> ERROR qtest-aarch64/qom-test - too few tests run (expected 83, got 31)
>>
>> I suspect the new machine type has a default of more than 2GB
>> of RAM, which won't work on 32 bit systems.
>
> ok. I guess we need to change the Fuji.
If the machine requires 2GiB, I'd rather not modify it but not
register it on 32-bit hosts. Better to avoid Frankenstein machines.
Thoughts?
- [PULL 03/14] watchdog: aspeed: Sanitize control register values, (continued)
- [PULL 03/14] watchdog: aspeed: Sanitize control register values, Cédric Le Goater, 2021/09/13
- [PULL 01/14] hw: arm: aspeed: Enable eth0 interface for aspeed-ast2600-evb, Cédric Le Goater, 2021/09/13
- [PULL 05/14] hw: aspeed_gpio: Simplify 1.8V defines, Cédric Le Goater, 2021/09/13
- [PULL 02/14] hw: arm: aspeed: Enable mac0/1 instead of mac1/2 for g220a, Cédric Le Goater, 2021/09/13
- [PULL 11/14] arm/aspeed: Add DPS310 to Witherspoon and Rainier, Cédric Le Goater, 2021/09/13
- [PULL 10/14] hw/misc: Add Infineon DPS310 sensor model, Cédric Le Goater, 2021/09/13
- [PULL 06/14] hw: aspeed_gpio: Clarify GPIO controller name, Cédric Le Goater, 2021/09/13
- [PULL 12/14] hw/arm/aspeed: Initialize AST2600 UART clock selection registers, Cédric Le Goater, 2021/09/13
- Re: [PULL 00/14] aspeed queue, Peter Maydell, 2021/09/14
[PULL 00/14] aspeed queue, Cédric Le Goater, 2021/09/20
- [PULL 01/14] hw: arm: aspeed: Enable eth0 interface for aspeed-ast2600-evb, Cédric Le Goater, 2021/09/20
- [PULL 03/14] watchdog: aspeed: Sanitize control register values, Cédric Le Goater, 2021/09/20
- [PULL 02/14] hw: arm: aspeed: Enable mac0/1 instead of mac1/2 for g220a, Cédric Le Goater, 2021/09/20
- [PULL 04/14] watchdog: aspeed: Fix sequential control writes, Cédric Le Goater, 2021/09/20
- [PULL 08/14] arm/aspeed: rainier: Add i2c eeproms and muxes, Cédric Le Goater, 2021/09/20
- [PULL 05/14] hw: aspeed_gpio: Simplify 1.8V defines, Cédric Le Goater, 2021/09/20
- [PULL 10/14] hw/misc: Add Infineon DPS310 sensor model, Cédric Le Goater, 2021/09/20
- [PULL 11/14] arm/aspeed: Add DPS310 to Witherspoon and Rainier, Cédric Le Goater, 2021/09/20
- [PULL 09/14] aspeed: Emulate the AST2600A3, Cédric Le Goater, 2021/09/20