[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-commits] [qemu/qemu] ac2a98: vfio-pci: Fix GTT wrap-around for Sky
From: |
GitHub |
Subject: |
[Qemu-commits] [qemu/qemu] ac2a98: vfio-pci: Fix GTT wrap-around for Skylake+ IGD |
Date: |
Mon, 13 Feb 2017 02:30:10 -0800 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: ac2a9862b761f6ccabc35ac5d38c948dec97777d
https://github.com/qemu/qemu/commit/ac2a9862b761f6ccabc35ac5d38c948dec97777d
Author: Alex Williamson <address@hidden>
Date: 2017-02-10 (Fri, 10 Feb 2017)
Changed paths:
M hw/vfio/pci-quirks.c
Log Message:
-----------
vfio-pci: Fix GTT wrap-around for Skylake+ IGD
Previous IGD, up through Broadwell, only seem to write GTT values into
the first 1MB of space allocated for the BDSM, but clearly the GTT
can be multiple MB in size. Our test in vfio_igd_quirk_data_write()
correctly filters out indexes beyond 1MB, but given the 1MB mask we're
using, we re-apply writes only to the first 1MB of the guest allocated
BDSM.
We can't assume either the host or guest BDSM is naturally aligned, so
we can't simply apply a different mask. Instead, save the host BDSM
and do the arithmetic to subtract the host value to get the BDSM
offset and add it to the guest allocated BDSM.
Reported-by: Alexander Indenbaum <address@hidden>
Tested-by: Alexander Indenbaum <address@hidden>
Signed-off-by: Alex Williamson <address@hidden>
Commit: f23363ea44abbd514b26f40f0fc449160d3397dc
https://github.com/qemu/qemu/commit/f23363ea44abbd514b26f40f0fc449160d3397dc
Author: Thomas Huth <address@hidden>
Date: 2017-02-10 (Fri, 10 Feb 2017)
Changed paths:
M hw/vfio/pci-quirks.c
Log Message:
-----------
hw/vfio/pci-quirks: Set category of the "vfio-pci-igd-lpc-bridge" device
The device has "bridge" in its name, so it should obviously be in
the category DEVICE_CATEGORY_BRIDGE.
Signed-off-by: Thomas Huth <address@hidden>
Signed-off-by: Alex Williamson <address@hidden>
Commit: e197de50c6cfad69d2c26c22693b57678ae99d14
https://github.com/qemu/qemu/commit/e197de50c6cfad69d2c26c22693b57678ae99d14
Author: Thomas Huth <address@hidden>
Date: 2017-02-10 (Fri, 10 Feb 2017)
Changed paths:
M default-configs/arm-softmmu.mak
M hw/vfio/Makefile.objs
Log Message:
-----------
hw/vfio: Add CONFIG switches for calxeda-xgmac and amd-xgbe
Both devices seem to be specific to the ARM platform. It's confusing
for the users if they show up on other target architectures, too
(e.g. when the user runs QEMU with "-device ?" to get a list of
supported devices). Thus let's introduce proper configuration switches
so that the devices are only compiled and included when they are
really required.
Signed-off-by: Thomas Huth <address@hidden>
Signed-off-by: Alex Williamson <address@hidden>
Commit: ed3d90df7c75203d9d4bae135f0a3c75be209f78
https://github.com/qemu/qemu/commit/ed3d90df7c75203d9d4bae135f0a3c75be209f78
Author: Peter Maydell <address@hidden>
Date: 2017-02-13 (Mon, 13 Feb 2017)
Changed paths:
M default-configs/arm-softmmu.mak
M hw/vfio/Makefile.objs
M hw/vfio/pci-quirks.c
Log Message:
-----------
Merge remote-tracking branch 'remotes/awilliam/tags/vfio-updates-20170210.0'
into staging
VFIO updates 2017-02-10
- Fix GTT wrap-around for Skylake IGD assignment (Alex Williamson)
- Tag vfio-pci-igd-lpc-bridge as bridge device category (Thomas Huth)
- Don't build calxeda-xgmac or amd-xgbe except on ARM (Thomas Huth)
# gpg: Signature made Fri 10 Feb 2017 21:34:33 GMT
# gpg: using RSA key 0x239B9B6E3BB08B22
# gpg: Good signature from "Alex Williamson <address@hidden>"
# gpg: aka "Alex Williamson <address@hidden>"
# gpg: aka "Alex Williamson <address@hidden>"
# gpg: aka "Alex Williamson <address@hidden>"
# Primary key fingerprint: 42F6 C04E 540B D1A9 9E7B 8A90 239B 9B6E 3BB0 8B22
* remotes/awilliam/tags/vfio-updates-20170210.0:
hw/vfio: Add CONFIG switches for calxeda-xgmac and amd-xgbe
hw/vfio/pci-quirks: Set category of the "vfio-pci-igd-lpc-bridge" device
vfio-pci: Fix GTT wrap-around for Skylake+ IGD
Signed-off-by: Peter Maydell <address@hidden>
Compare: https://github.com/qemu/qemu/compare/6311b19b5c65...ed3d90df7c75
[Prev in Thread] |
Current Thread |
[Next in Thread] |
- [Qemu-commits] [qemu/qemu] ac2a98: vfio-pci: Fix GTT wrap-around for Skylake+ IGD,
GitHub <=