[Qemu-commits] [qemu/qemu] af903c: target/arm: Don't migrate CPUARMState

qemu-commits
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-commits] [qemu/qemu] af903c: target/arm: Don't migrate CPUARMState

From:	Peter Maydell
Subject:	[Qemu-commits] [qemu/qemu] af903c: target/arm: Don't migrate CPUARMState.features
Date:	Thu, 11 Feb 2021 08:59:22 -0800
  Branch: refs/heads/staging
  Home:   https://github.com/qemu/qemu
  Commit: af903caed9fc62cc60a589da75e61ea8008c8265
      
https://github.com/qemu/qemu/commit/af903caed9fc62cc60a589da75e61ea8008c8265
  Author: Aaron Lindsay <aaron@os.amperecomputing.com>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M target/arm/machine.c

  Log Message:
  -----------
  target/arm: Don't migrate CPUARMState.features

As feature flags are added or removed, the meanings of bits in the
`features` field can change between QEMU versions, causing migration
failures. Additionally, migrating the field is not useful because it is
a constant function of the CPU being used.

Fixes: LP:1914696
Signed-off-by: Aaron Lindsay <aaron@os.amperecomputing.com>
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Tested-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 10d0ef3e6cfe228df4b2d3e27325f1b0e2b71fd5
      
https://github.com/qemu/qemu/commit/10d0ef3e6cfe228df4b2d3e27325f1b0e2b71fd5
  Author: Mike Nawrocki <michael.nawrocki@gtri.gatech.edu>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M target/arm/cpu.h
    M target/arm/helper.c

  Log Message:
  -----------
  target/arm: Fix SCR RES1 handling

The FW and AW bits of SCR_EL3 are RES1 only in some contexts. Force them
to 1 only when there is no support for AArch32 at EL1 or above.

The reset value will be 0x30 only if the CPU is AArch64-only; if there
is support for AArch32 at EL1 or above, it will be reset to 0.

Also adds helper function isar_feature_aa64_aa32_el1 to check if AArch32
is supported at EL1 or above.

Signed-off-by: Mike Nawrocki <michael.nawrocki@gtri.gatech.edu>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210203165552.16306-2-michael.nawrocki@gtri.gatech.edu
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 377a3ba25c984303029588e9032002235f157d34
      
https://github.com/qemu/qemu/commit/377a3ba25c984303029588e9032002235f157d34
  Author: Hao Wu <wuhaotsh@google.com>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M hw/arm/npcm7xx.c

  Log Message:
  -----------
  hw/arm: Remove GPIO from unimplemented NPCM7XX

NPCM7XX GPIO devices have been implemented in hw/gpio/npcm7xx-gpio.c. So
we removed them from the unimplemented devices list.

Reviewed-by: Doug Evans<dje@google.com>
Reviewed-by: Tyrong Ting<kfting@nuvoton.com>
Signed-off-by: Hao Wu<wuhaotsh@google.com>
Message-id: 20210129005845.416272-2-wuhaotsh@google.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: dc8b18534ea1dcc90d80ad9a61a3b0aa7eb312fb
      
https://github.com/qemu/qemu/commit/dc8b18534ea1dcc90d80ad9a61a3b0aa7eb312fb
  Author: Rebecca Cran <rebecca@nuviainc.com>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M target/arm/cpu.h
    M target/arm/helper.c
    M target/arm/internals.h
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Add support for FEAT_DIT, Data Independent Timing

Add support for FEAT_DIT. DIT (Data Independent Timing) is a required
feature for ARMv8.4. Since virtual machine execution is largely
nondeterministic and TCG is outside of the security domain, it's
implemented as a NOP.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210208065700.19454-2-rebecca@nuviainc.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: f944a854ce4007000accf7c191b5b52916947198
      
https://github.com/qemu/qemu/commit/f944a854ce4007000accf7c191b5b52916947198
  Author: Rebecca Cran <rebecca@nuviainc.com>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M target/arm/helper-a64.c
    M target/arm/helper.c
    M target/arm/op_helper.c

  Log Message:
  -----------
  target/arm: Support AA32 DIT by moving PSTATE_SS from cpsr into env->pstate

cpsr has been treated as being the same as spsr, but it isn't.
Since PSTATE_SS isn't in cpsr, remove it and move it into env->pstate.

This allows us to add support for CPSR_DIT, adding helper functions
to merge SPSR_ELx to and from CPSR.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210208065700.19454-3-rebecca@nuviainc.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 2bf1eff9e9125a3d73901991dcfb9cb2ace03be1
      
https://github.com/qemu/qemu/commit/2bf1eff9e9125a3d73901991dcfb9cb2ace03be1
  Author: Rebecca Cran <rebecca@nuviainc.com>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M target/arm/cpu64.c

  Log Message:
  -----------
  target/arm: Set ID_AA64PFR0.DIT and ID_PFR0.DIT to 1 for "max" AA64 CPU

Enable FEAT_DIT for the "max" AARCH64 CPU.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210208065700.19454-4-rebecca@nuviainc.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 5385320c2b3183f2e18dbc55c23ecba9272500c2
      
https://github.com/qemu/qemu/commit/5385320c2b3183f2e18dbc55c23ecba9272500c2
  Author: Rebecca Cran <rebecca@nuviainc.com>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M target/arm/cpu.c

  Log Message:
  -----------
  target/arm: Set ID_PFR0.DIT to 1 for "max" 32-bit CPU

Enable FEAT_DIT for the "max" 32-bit CPU.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210208065700.19454-5-rebecca@nuviainc.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 932a8d1f11ccfbf196ee6fb4a5ccdf274b14a78c
      
https://github.com/qemu/qemu/commit/932a8d1f11ccfbf196ee6fb4a5ccdf274b14a78c
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M hw/arm/aspeed_ast2600.c
    M hw/arm/musca.c
    M hw/misc/arm_integrator_debug.c
    M hw/timer/arm_timer.c
    M include/hw/dma/pl080.h
    M include/hw/misc/arm_integrator_debug.h
    M include/hw/ssi/pl022.h

  Log Message:
  -----------
  arm: Update infocenter.arm.com URLs

Update infocenter.arm.com URLs for various pieces of Arm
documentation to the new developer.arm.com equivalents.  (There is a
redirection in place from the old URLs, but we might as well update
our comments in case the redirect ever disappears in future.)

This patch covers all the URLs which are not MPS2/SSE-200/IoTKit
related (those are dealt with in a different patch).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210205171456.19939-1-peter.maydell@linaro.org


  Commit: e6a41a045c298538d303cd8fe8d7ae29a0c066ad
      
https://github.com/qemu/qemu/commit/e6a41a045c298538d303cd8fe8d7ae29a0c066ad
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M accel/tcg/cpu-exec.c

  Log Message:
  -----------
  accel/tcg: Add URL of clang bug to comment about our workaround

In cpu_exec() we have a longstanding workaround for compilers which
do not correctly implement the part of the sigsetjmp()/siglongjmp()
spec which requires that local variables which are not changed
between the setjmp and the longjmp retain their value.

I recently ran across the upstream clang bug report for this; add a
link to it to the comment describing the workaround, and generally
expand the comment, so that we have a reasonable chance in future of
understanding why it's there and determining when we can remove it,
assuming clang eventually fixes the bug.

Remove the /* buggy compiler */ comments on the #else and #endif:
they don't add anything to understanding and are somewhat misleading
since they're sandwiching the code path for *non*-buggy compilers.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20210129130330.30820-1-peter.maydell@linaro.org


  Commit: 9e2db0ab71e866583f744fdd3e5dd3049cad1129
      
https://github.com/qemu/qemu/commit/9e2db0ab71e866583f744fdd3e5dd3049cad1129
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M accel/tcg/translate-all.c
    M include/exec/cpu-all.h
    M linux-user/mmap.c
    M linux-user/syscall.c

  Log Message:
  -----------
  tcg: Introduce target-specific page data for user-only

This data can be allocated by page_alloc_target_data() and
released by page_set_flags(start, end, prot | PAGE_RESET).

This data will be used to hold tag memory for AArch64 MTE.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-2-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 1ba999cf043fb317c3fffa7cedd975fe83b82bee
      
https://github.com/qemu/qemu/commit/1ba999cf043fb317c3fffa7cedd975fe83b82bee
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M include/exec/cpu-all.h
    M linux-user/mmap.c

  Log Message:
  -----------
  linux-user: Introduce PAGE_ANON

Record whether the backing page is anonymous, or if it has file
backing.  This will allow us to get close to the Linux AArch64
ABI for MTE, which allows tag memory only on ram-backed VMAs.

The real ABI allows tag memory on files, when those files are
on ram-backed filesystems, such as tmpfs.  We will not be able
to implement that in QEMU linux-user.

Thankfully, anonymous memory for malloc arenas is the primary
consumer of this feature, so this restricted version should
still be of use.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 0feea900ed1c54ccb7ed96241786be57c748593b
      
https://github.com/qemu/qemu/commit/0feea900ed1c54ccb7ed96241786be57c748593b
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M bsd-user/main.c
    M include/exec/cpu-all.h
    M linux-user/elfload.c
    M linux-user/main.c

  Log Message:
  -----------
  exec: Use uintptr_t for guest_base

This is more descriptive than 'unsigned long'.
No functional change, since these match on all linux+bsd hosts.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 8c1dc743fab319e349618c758eaea424e6724dcd
      
https://github.com/qemu/qemu/commit/8c1dc743fab319e349618c758eaea424e6724dcd
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M include/exec/cpu_ldst.h

  Log Message:
  -----------
  exec: Use uintptr_t in cpu_ldst.h

This is more descriptive than 'unsigned long'.
No functional change, since these match on all linux+bsd hosts.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 541df5e6b0e4e8945a1ccb410fb4339b39838c8e
      
https://github.com/qemu/qemu/commit/541df5e6b0e4e8945a1ccb410fb4339b39838c8e
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M include/exec/cpu_ldst.h

  Log Message:
  -----------
  exec: Improve types for guest_addr_valid

Return bool not int; pass abi_ulong not 'unsigned long'.
All callers use abi_ulong already, so the change in type
has no effect.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-6-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 2ac6c85315cb5f0d9e5a61dcfcaba6a22d6d0551
      
https://github.com/qemu/qemu/commit/2ac6c85315cb5f0d9e5a61dcfcaba6a22d6d0551
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M linux-user/qemu.h

  Log Message:
  -----------
  linux-user: Check for overflow in access_ok

Verify that addr + size - 1 does not wrap around.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-7-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 3c443db15970d6995eb865317557e80299aca563
      
https://github.com/qemu/qemu/commit/3c443db15970d6995eb865317557e80299aca563
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M linux-user/qemu.h

  Log Message:
  -----------
  linux-user: Tidy VERIFY_READ/VERIFY_WRITE

These constants are only ever used with access_ok, and friends.
Rather than translating them to PAGE_* bits, let them equal
the PAGE_* bits to begin.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-8-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 36c95462e7312e901f2d4a6818f1e4d67186fede
      
https://github.com/qemu/qemu/commit/36c95462e7312e901f2d4a6818f1e4d67186fede
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M bsd-user/qemu.h

  Log Message:
  -----------
  bsd-user: Tidy VERIFY_READ/VERIFY_WRITE

These constants are only ever used with access_ok, and friends.
Rather than translating them to PAGE_* bits, let them equal
the PAGE_* bits to begin.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-9-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: cf63a16dd7b1f5b9d142a1a8a3041b07467164c8
      
https://github.com/qemu/qemu/commit/cf63a16dd7b1f5b9d142a1a8a3041b07467164c8
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M include/exec/cpu_ldst.h

  Log Message:
  -----------
  linux-user: Do not use guest_addr_valid for h2g_valid

This is the only use of guest_addr_valid that does not begin
with a guest address, but a host address being transformed to
a guest address.

We will shortly adjust guest_addr_valid to handle guest memory
tags, and the host address should not be subjected to that.

Move h2g_valid adjacent to the other h2g macros.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-10-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 8f315bb3764bdbe4baab764a4f0c68af93b32817
      
https://github.com/qemu/qemu/commit/8f315bb3764bdbe4baab764a4f0c68af93b32817
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M include/exec/cpu_ldst.h

  Log Message:
  -----------
  linux-user: Fix guest_addr_valid vs reserved_va

We must always use GUEST_ADDR_MAX, because even 32-bit hosts can
use -R <reserved_va> to restrict the memory address of the guest.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-11-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: b9c6e7546dfdbcbfd3c0ce9c93e4638018b0e17d
      
https://github.com/qemu/qemu/commit/b9c6e7546dfdbcbfd3c0ce9c93e4638018b0e17d
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M include/exec/cpu_ldst.h

  Log Message:
  -----------
  exec: Introduce cpu_untagged_addr

Provide an identity fallback for target that do not
use tagged addresses.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-12-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 93b79cd505212e286ef7484daf06c3cf979d40ce
      
https://github.com/qemu/qemu/commit/93b79cd505212e286ef7484daf06c3cf979d40ce
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M accel/tcg/translate-all.c
    M accel/tcg/user-exec.c
    M include/exec/cpu_ldst.h
    M include/exec/exec-all.h
    M linux-user/elfload.c
    M linux-user/flatload.c
    M linux-user/hppa/cpu_loop.c
    M linux-user/i386/cpu_loop.c
    M linux-user/mmap.c
    M linux-user/ppc/signal.c
    M linux-user/qemu.h
    M linux-user/syscall.c
    M target/arm/helper-a64.c
    M target/hppa/op_helper.c
    M target/i386/tcg/mem_helper.c
    M target/s390x/mem_helper.c

  Log Message:
  -----------
  exec: Use cpu_untagged_addr in g2h; split out g2h_untagged

Use g2h_untagged in contexts that have no cpu, e.g. the binary
loaders that operate before the primary cpu is created.  As a
colollary, target_mmap and friends must use untagged addresses,
since they are used by the loaders.

Use g2h_untagged on values returned from target_mmap, as the
kernel never applies a tag itself.

Use g2h_untagged on all pc values.  The only current user of
tags, aarch64, removes tags from code addresses upon branch,
so "pc" is always untagged.

Use g2h with the cpu context on hand wherever possible.

Use g2h_untagged in lock_user, which will be updated soon.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-13-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: c17eeb19481c81e173ba5f8ecd5cb04cdf639f57
      
https://github.com/qemu/qemu/commit/c17eeb19481c81e173ba5f8ecd5cb04cdf639f57
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M linux-user/syscall.c

  Log Message:
  -----------
  linux-user: Explicitly untag memory management syscalls

We define target_mmap et al as untagged, so that they can be
used from the binary loaders.  Explicitly call cpu_untagged_addr
for munmap, mprotect, mremap syscall entry points.

Add a few comments for the syscalls that are exempted by the
kernel's tagged-address-abi.rst.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-14-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: cc321616e1ea7460c683c4e1568532b3ffef8a83
      
https://github.com/qemu/qemu/commit/cc321616e1ea7460c683c4e1568532b3ffef8a83
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M linux-user/qemu.h

  Log Message:
  -----------
  linux-user: Use guest_range_valid in access_ok

We're currently open-coding the range check in access_ok;
use guest_range_valid when size != 0.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-15-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: afa6226aeee119636dde3d4dfbd4017ac8ba5e2e
      
https://github.com/qemu/qemu/commit/afa6226aeee119636dde3d4dfbd4017ac8ba5e2e
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M accel/tcg/user-exec.c
    M include/exec/cpu_ldst.h
    M linux-user/mmap.c
    M linux-user/qemu.h
    M linux-user/syscall.c

  Log Message:
  -----------
  exec: Rename guest_{addr,range}_valid to *_untagged

The places that use these are better off using untagged
addresses, so do not provide a tagged versions.  Rename
to make it clear about the address type.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-16-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 5cd08a14eb8673dc26d5940becc36e52f32312d9
      
https://github.com/qemu/qemu/commit/5cd08a14eb8673dc26d5940becc36e52f32312d9
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M linux-user/elfload.c
    M linux-user/hppa/cpu_loop.c
    M linux-user/i386/cpu_loop.c
    M linux-user/i386/signal.c
    M linux-user/qemu.h
    M linux-user/syscall.c

  Log Message:
  -----------
  linux-user: Use cpu_untagged_addr in access_ok; split out *_untagged

Provide both tagged and untagged versions of access_ok.
In a few places use thread_cpu, as the user is several
callees removed from do_syscall1.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-17-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: afd403c4b47316fefc58de150173f835ef1d1b7e
      
https://github.com/qemu/qemu/commit/afd403c4b47316fefc58de150173f835ef1d1b7e
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M linux-user/qemu.h
    M linux-user/uaccess.c

  Log Message:
  -----------
  linux-user: Move lock_user et al out of line

These functions are not small, except for unlock_user
without debugging enabled.  Move them out of line, and
add missing braces on the way.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-18-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: c2e4a7865f0c8c1bd0cb80a558732018d9eb3938
      
https://github.com/qemu/qemu/commit/c2e4a7865f0c8c1bd0cb80a558732018d9eb3938
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M linux-user/qemu.h
    M linux-user/uaccess.c

  Log Message:
  -----------
  linux-user: Fix types in uaccess.c

For copy_*_user, only 0 and -TARGET_EFAULT are returned; no need
to involve abi_long.  Use size_t for lengths.  Use bool for the
lock_user copy argument.  Use ssize_t for target_strlen, because
we can't overflow the host memory space.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-19-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: a49e90685c5da48210f2f49f528af6cc9f3049b2
      
https://github.com/qemu/qemu/commit/a49e90685c5da48210f2f49f528af6cc9f3049b2
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M linux-user/uaccess.c

  Log Message:
  -----------
  linux-user: Handle tags in lock_user/unlock_user

Resolve the untagged address once, using thread_cpu.
Tidy the DEBUG_REMAP code using glib routines.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20210210000223.884088-20-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: c60b13e205de1326bd1a4745071722d9e581dd74
      
https://github.com/qemu/qemu/commit/c60b13e205de1326bd1a4745071722d9e581dd74
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M linux-user/aarch64/target_syscall.h
    M linux-user/syscall.c
    M target/arm/cpu-param.h
    M target/arm/cpu.h

  Log Message:
  -----------
  linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLE

This is the prctl bit that controls whether syscalls accept tagged
addresses.  See Documentation/arm64/tagged-address-abi.rst in the
linux kernel.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-21-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: d45926bea6b3fa157fceef0c9a02fae7120bf61e
      
https://github.com/qemu/qemu/commit/d45926bea6b3fa157fceef0c9a02fae7120bf61e
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Improve gen_top_byte_ignore

Use simple arithmetic instead of a conditional
move when tbi0 != tbi1.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-22-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: fa43b1981fc9c58bcdf7aead8e789afa8ca881e1
      
https://github.com/qemu/qemu/commit/fa43b1981fc9c58bcdf7aead8e789afa8ca881e1
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M target/arm/cpu.c
    M target/arm/internals.h
    M tests/tcg/aarch64/pauth-2.c

  Log Message:
  -----------
  target/arm: Use the proper TBI settings for linux-user

We were fudging TBI1 enabled to speed up the generated code.
Now that we've improved the code generation, remove this.
Also, tidy the comment to reflect the current code.

The pauth test was testing a kernel address (-1) and making
incorrect assumptions about TBI1; stick to userland addresses.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-23-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: c3c544ea28264721ad2cfc4f1a89211465d31905
      
https://github.com/qemu/qemu/commit/c3c544ea28264721ad2cfc4f1a89211465d31905
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M linux-user/aarch64/target_syscall.h
    M linux-user/syscall.c

  Log Message:
  -----------
  linux-user/aarch64: Implement PR_MTE_TCF and PR_MTE_TAG

These prctl fields are required for the function of MTE.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-24-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 27151f025b7c2a954db5a298bc7508a081f2654c
      
https://github.com/qemu/qemu/commit/27151f025b7c2a954db5a298bc7508a081f2654c
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M include/exec/cpu-all.h
    M linux-user/mmap.c
    M linux-user/syscall_defs.h
    M target/arm/cpu.h

  Log Message:
  -----------
  linux-user/aarch64: Implement PROT_MTE

Remember the PROT_MTE bit as PAGE_MTE/PAGE_TARGET_2.
Otherwise this does not yet have effect.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-25-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 5959db53ab2b547c9e25cc415600fe5a340a2e83
      
https://github.com/qemu/qemu/commit/5959db53ab2b547c9e25cc415600fe5a340a2e83
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M target/arm/internals.h
    A target/arm/syndrome.h

  Log Message:
  -----------
  target/arm: Split out syndrome.h from internals.h

Move everything related to syndromes to a new file,
which can be shared with linux-user.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-26-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 0803f0f8b11dfd7184d880533743b7464b38dfdb
      
https://github.com/qemu/qemu/commit/0803f0f8b11dfd7184d880533743b7464b38dfdb
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M linux-user/aarch64/cpu_loop.c
    M target/arm/tlb_helper.c

  Log Message:
  -----------
  linux-user/aarch64: Pass syndrome to EXC_*_ABORT

A proper syndrome is required to fill in the proper si_code.
Use page_get_flags to determine permission vs translation for user-only.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-27-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 89d7333ec3d68137793543fb9b247d537b45ffee
      
https://github.com/qemu/qemu/commit/89d7333ec3d68137793543fb9b247d537b45ffee
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M linux-user/aarch64/cpu_loop.c
    M linux-user/aarch64/target_signal.h

  Log Message:
  -----------
  linux-user/aarch64: Signal SEGV_MTESERR for sync tag check fault

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-28-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 84134b31065f420a32ee1e07c546fc7a022632b4
      
https://github.com/qemu/qemu/commit/84134b31065f420a32ee1e07c546fc7a022632b4
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M linux-user/aarch64/cpu_loop.c
    M linux-user/aarch64/target_signal.h
    M target/arm/mte_helper.c

  Log Message:
  -----------
  linux-user/aarch64: Signal SEGV_MTEAERR for async tag check error

The real kernel collects _TIF_MTE_ASYNC_FAULT into the current thread's
state on any kernel entry (interrupt, exception etc), and then delivers
the signal in advance of resuming the thread.

This means that while the signal won't be delivered immediately, it will
not be delayed forever -- at minimum it will be delivered after the next
clock interrupt.

We don't have a clock interrupt in linux-user, so we issue a cpu_kick
to signal a return to the main loop at the end of the current TB.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-29-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 1b2fc9ac2b03f4098452cace173d30015d9625b1
      
https://github.com/qemu/qemu/commit/1b2fc9ac2b03f4098452cace173d30015d9625b1
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M target/arm/mte_helper.c

  Log Message:
  -----------
  target/arm: Add allocation tag storage for user mode

Use the now-saved PAGE_ANON and PAGE_MTE bits,
and the per-page saved data.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-30-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 8acf37cc99f72b8131483c698190f21f667ee617
      
https://github.com/qemu/qemu/commit/8acf37cc99f72b8131483c698190f21f667ee617
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M target/arm/cpu.c

  Log Message:
  -----------
  target/arm: Enable MTE for user-only

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-31-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 828178006f61f458bc5547775f74ce9afc552282
      
https://github.com/qemu/qemu/commit/828178006f61f458bc5547775f74ce9afc552282
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M tests/tcg/aarch64/Makefile.target
    A tests/tcg/aarch64/mte-1.c
    A tests/tcg/aarch64/mte-2.c
    A tests/tcg/aarch64/mte-3.c
    A tests/tcg/aarch64/mte-4.c
    A tests/tcg/aarch64/mte.h
    M tests/tcg/configure.sh

  Log Message:
  -----------
  tests/tcg/aarch64: Add mte smoke tests

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210210000223.884088-32-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: b48b6bb951c6bb02761a6350aa6e16e57b6c2e9f
      
https://github.com/qemu/qemu/commit/b48b6bb951c6bb02761a6350aa6e16e57b6c2e9f
  Author: Doug Evans <dje@google.com>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M hw/net/meson.build
    A hw/net/npcm7xx_emc.c
    M hw/net/trace-events
    A include/hw/net/npcm7xx_emc.h

  Log Message:
  -----------
  hw/net: Add npcm7xx emc model

This is a 10/100 ethernet device that has several features.
Only the ones needed by the Linux driver have been implemented.
See npcm7xx_emc.c for a list of unimplemented features.

Reviewed-by: Hao Wu <wuhaotsh@google.com>
Reviewed-by: Avi Fishman <avi.fishman@nuvoton.com>
Signed-off-by: Doug Evans <dje@google.com>
Message-id: 20210209015541.778833-2-dje@google.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 94a041f5dc42e151b96609968a28ff3c0ac61a9a
      
https://github.com/qemu/qemu/commit/94a041f5dc42e151b96609968a28ff3c0ac61a9a
  Author: Doug Evans <dje@google.com>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M docs/system/arm/nuvoton.rst
    M hw/arm/npcm7xx.c
    M include/hw/arm/npcm7xx.h

  Log Message:
  -----------
  hw/arm: Add npcm7xx emc model

This is a 10/100 ethernet device that has several features.
Only the ones needed by the Linux driver have been implemented.
See npcm7xx_emc.c for a list of unimplemented features.

Reviewed-by: Hao Wu <wuhaotsh@google.com>
Reviewed-by: Avi Fishman <avi.fishman@nuvoton.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Doug Evans <dje@google.com>
Message-id: 20210209015541.778833-3-dje@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 171ddb19576276e398f9c1b93abc9143f115e10a
      
https://github.com/qemu/qemu/commit/171ddb19576276e398f9c1b93abc9143f115e10a
  Author: Doug Evans <dje@google.com>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M tests/qtest/meson.build
    A tests/qtest/npcm7xx_emc-test.c

  Log Message:
  -----------
  tests/qtests: Add npcm7xx emc model test

Reviewed-by: Hao Wu <wuhaotsh@google.com>
Reviewed-by: Avi Fishman <avi.fishman@nuvoton.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Doug Evans <dje@google.com>
Message-id: 20210209015541.778833-4-dje@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 387106c11ae729988ffb830dae6a5ec040a1673e
      
https://github.com/qemu/qemu/commit/387106c11ae729988ffb830dae6a5ec040a1673e
  Author: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M hw/arm/xlnx-versal.c

  Log Message:
  -----------
  hw/arm: versal: Use nr_apu_cpus in favor of hard coding 2

Use nr_apu_cpus in favor of hard coding 2.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Luc Michel <luc@lmichel.fr>
Message-id: 20210210142048.3125878-2-edgar.iglesias@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 5213c78932ecf4bae18d62baf8735724e25fb478
      
https://github.com/qemu/qemu/commit/5213c78932ecf4bae18d62baf8735724e25fb478
  Author: Daniel Müller <muellerd@fb.com>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M target/arm/helper.c

  Log Message:
  -----------
  target/arm: Correctly initialize MDCR_EL2.HPMN

When working with performance monitoring counters, we look at
MDCR_EL2.HPMN as part of the check whether a counter is enabled. This
check fails, because MDCR_EL2.HPMN is reset to 0, meaning that no
counters are "enabled" for < EL2.
That's in violation of the Arm specification, which states that

> On a Warm reset, this field [MDCR_EL2.HPMN] resets to the value in
> PMCR_EL0.N

That's also what a comment in the code acknowledges, but the necessary
adjustment seems to have been forgotten when support for more counters
was added.
This change fixes the issue by setting the reset value to PMCR.N, which
is four.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 54ebfee79cc9e8962a8767b5100a23f5b93ab819
      
https://github.com/qemu/qemu/commit/54ebfee79cc9e8962a8767b5100a23f5b93ab819
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M accel/tcg/cpu-exec.c
    M accel/tcg/translate-all.c
    M accel/tcg/user-exec.c
    M bsd-user/main.c
    M bsd-user/qemu.h
    M docs/system/arm/nuvoton.rst
    M hw/arm/aspeed_ast2600.c
    M hw/arm/musca.c
    M hw/arm/npcm7xx.c
    M hw/arm/xlnx-versal.c
    M hw/misc/arm_integrator_debug.c
    M hw/net/meson.build
    A hw/net/npcm7xx_emc.c
    M hw/net/trace-events
    M hw/timer/arm_timer.c
    M include/exec/cpu-all.h
    M include/exec/cpu_ldst.h
    M include/exec/exec-all.h
    M include/hw/arm/npcm7xx.h
    M include/hw/dma/pl080.h
    M include/hw/misc/arm_integrator_debug.h
    A include/hw/net/npcm7xx_emc.h
    M include/hw/ssi/pl022.h
    M linux-user/aarch64/cpu_loop.c
    M linux-user/aarch64/target_signal.h
    M linux-user/aarch64/target_syscall.h
    M linux-user/elfload.c
    M linux-user/flatload.c
    M linux-user/hppa/cpu_loop.c
    M linux-user/i386/cpu_loop.c
    M linux-user/i386/signal.c
    M linux-user/main.c
    M linux-user/mmap.c
    M linux-user/ppc/signal.c
    M linux-user/qemu.h
    M linux-user/syscall.c
    M linux-user/syscall_defs.h
    M linux-user/uaccess.c
    M target/arm/cpu-param.h
    M target/arm/cpu.c
    M target/arm/cpu.h
    M target/arm/cpu64.c
    M target/arm/helper-a64.c
    M target/arm/helper.c
    M target/arm/internals.h
    M target/arm/machine.c
    M target/arm/mte_helper.c
    M target/arm/op_helper.c
    A target/arm/syndrome.h
    M target/arm/tlb_helper.c
    M target/arm/translate-a64.c
    M target/hppa/op_helper.c
    M target/i386/tcg/mem_helper.c
    M target/s390x/mem_helper.c
    M tests/qtest/meson.build
    A tests/qtest/npcm7xx_emc-test.c
    M tests/tcg/aarch64/Makefile.target
    A tests/tcg/aarch64/mte-1.c
    A tests/tcg/aarch64/mte-2.c
    A tests/tcg/aarch64/mte-3.c
    A tests/tcg/aarch64/mte-4.c
    A tests/tcg/aarch64/mte.h
    M tests/tcg/aarch64/pauth-2.c
    M tests/tcg/configure.sh

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210211' 
into staging

target-arm queue:
 * Correctly initialize MDCR_EL2.HPMN
 * versal: Use nr_apu_cpus in favor of hard coding 2
 * npcm7xx: Add ethernet device
 * Enable ARMv8.4-MemTag for user-mode emulation
 * accel/tcg: Add URL of clang bug to comment about our workaround
 * Add support for FEAT_DIT, Data Independent Timing
 * Remove GPIO from unimplemented NPCM7XX
 * Fix SCR RES1 handling
 * Don't migrate CPUARMState.features

# gpg: Signature made Thu 11 Feb 2021 12:58:15 GMT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" 
[ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20210211: (45 commits)
  target/arm: Correctly initialize MDCR_EL2.HPMN
  hw/arm: versal: Use nr_apu_cpus in favor of hard coding 2
  tests/qtests: Add npcm7xx emc model test
  hw/arm: Add npcm7xx emc model
  hw/net: Add npcm7xx emc model
  tests/tcg/aarch64: Add mte smoke tests
  target/arm: Enable MTE for user-only
  target/arm: Add allocation tag storage for user mode
  linux-user/aarch64: Signal SEGV_MTEAERR for async tag check error
  linux-user/aarch64: Signal SEGV_MTESERR for sync tag check fault
  linux-user/aarch64: Pass syndrome to EXC_*_ABORT
  target/arm: Split out syndrome.h from internals.h
  linux-user/aarch64: Implement PROT_MTE
  linux-user/aarch64: Implement PR_MTE_TCF and PR_MTE_TAG
  target/arm: Use the proper TBI settings for linux-user
  target/arm: Improve gen_top_byte_ignore
  linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLE
  linux-user: Handle tags in lock_user/unlock_user
  linux-user: Fix types in uaccess.c
  linux-user: Move lock_user et al out of line
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Compare: https://github.com/qemu/qemu/compare/c973f06521b0...54ebfee79cc9
[Prev in Thread]
Current Thread
[Next in Thread]
[Qemu-commits] [qemu/qemu] af903c: target/arm: Don't migrate CPUARMState.features, Peter Maydell <=
- [Qemu-commits] [qemu/qemu] af903c: target/arm: Don't migrate CPUARMState.features, Peter Maydell, 2021/02/12
Prev by Date: [Qemu-commits] [qemu/qemu] 886188: hw/block/nvme: fix legacy namespace registration
Next by Date: [Qemu-commits] [qemu/qemu] 4565d8: hw/arm: versal: Use nr_apu_cpus in favor of hard c...
Previous by thread: [Qemu-commits] [qemu/qemu] 886188: hw/block/nvme: fix legacy namespace registration
Next by thread: [Qemu-commits] [qemu/qemu] af903c: target/arm: Don't migrate CPUARMState.features
Index(es):
- Date
- Thread