[Qemu-commits] [qemu/qemu] 5b2c8a: target/arm: Make WFI a NOP for userspace emulators

[Peter Maydell]

  Branch: refs/heads/staging
  Home:   https://github.com/qemu/qemu
  Commit: 5b2c8af89b82a671137a2765b09ad24d0653661c
      
https://github.com/qemu/qemu/commit/5b2c8af89b82a671137a2765b09ad24d0653661c
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-05-10 (Mon, 10 May 2021)

  Changed paths:
    M target/arm/op_helper.c

  Log Message:
  -----------
  target/arm: Make WFI a NOP for userspace emulators

The WFI insn is not system-mode only, though it doesn't usually make
a huge amount of sense for userspace code to execute it.  Currently
if you try it in qemu-arm then the helper function will raise an
EXCP_HLT exception, which is not covered by the switch in cpu_loop()
and results in an abort:

qemu: unhandled CPU exception 0x10001 - aborting
R00=00000001 R01=408003e4 R02=408003ec R03=000102ec
R04=00010a28 R05=00010158 R06=00087460 R07=00010158
R08=00000000 R09=00000000 R10=00085b7c R11=408002a4
R12=408002b8 R13=408002a0 R14=0001057c R15=000102f8
PSR=60000010 -ZC- A usr32
qemu:handle_cpu_signal received signal outside vCPU context @ pc=0x7fcbfa4f0a12

Make the WFI helper function return immediately in the usermode
emulator. This turns WFI into a NOP, which is OK because:
 * architecturally "WFI is a NOP" is a permitted implementation
 * aarch64 Linux kernels use the SCTLR_EL1.nTWI bit to trap
   userspace WFI and NOP it (though aarch32 kernels currently
   just let WFI do whatever it would do)

We could in theory make the translate.c code special case user-mode
emulation and NOP the insn entirely rather than making the helper
do nothing, but because no real world code will be trying to
execute WFI we don't care about efficiency and the helper provides
a single place where we can make the change rather than having
to touch multiple places in translate.c and translate-a64.c.

Fixes: https://bugs.launchpad.net/qemu/+bug/1926759
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210430162212.825-1-peter.maydell@linaro.org


  Commit: f16a3bf81b8b01c53144167f6cc12fb126028972
      
https://github.com/qemu/qemu/commit/f16a3bf81b8b01c53144167f6cc12fb126028972
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-05-10 (Mon, 10 May 2021)

  Changed paths:
    M hw/sd/omap_mmc.c

  Log Message:
  -----------
  hw/sd/omap_mmc: Use device_cold_reset() instead of device_legacy_reset()

The omap_mmc_reset() function resets its SD card via
device_legacy_reset().  We know that the SD card does not have a qbus
of its own, so the new device_cold_reset() function (which resets
both the device and its child buses) is equivalent here to
device_legacy_reset() and we can just switch to the new API.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210430222348.8514-1-peter.maydell@linaro.org


  Commit: 415a9fb880c6bf383d649643a4ce65ea3bc9b084
      
https://github.com/qemu/qemu/commit/415a9fb880c6bf383d649643a4ce65ea3bc9b084
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-05-10 (Mon, 10 May 2021)

  Changed paths:
    M include/qemu/osdep.h
    M include/sysemu/os-posix.h
    M include/sysemu/os-win32.h

  Log Message:
  -----------
  osdep: Make os-win32.h and os-posix.h handle 'extern "C"' themselves

Both os-win32.h and os-posix.h include system header files. Instead
of having osdep.h include them inside its 'extern "C"' block, make
these headers handle that themselves, so that we don't include the
system headers inside 'extern "C"'.

This doesn't fix any current problems, but it's conceptually the
right way to handle system headers.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: b30a8c241fe22b9cbd0ad015809fc92688fee4ff
      
https://github.com/qemu/qemu/commit/b30a8c241fe22b9cbd0ad015809fc92688fee4ff
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-05-10 (Mon, 10 May 2021)

  Changed paths:
    M include/qemu/bswap.h

  Log Message:
  -----------
  include/qemu/bswap.h: Handle being included outside extern "C" block

Make bswap.h handle being included outside an 'extern "C"' block:
all system headers are included first, then all declarations are
put inside an 'extern "C"' block.

This requires a little rearrangement as currently we have an ifdef
ladder that has some system includes and some local declarations
or definitions, and we need to separate those out.

We want to do this because dis-asm.h includes bswap.h, dis-asm.h
may need to be included from C++ files, and system headers should
not be included within 'extern "C"' blocks.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 2c316f9af4752369ac86be85cd8846d6365e4e68
      
https://github.com/qemu/qemu/commit/2c316f9af4752369ac86be85cd8846d6365e4e68
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-05-10 (Mon, 10 May 2021)

  Changed paths:
    M disas/arm-a64.cc
    M disas/nanomips.cpp
    M include/disas/dis-asm.h

  Log Message:
  -----------
  include/disas/dis-asm.h: Handle being included outside 'extern "C"'

Make dis-asm.h handle being included outside an 'extern "C"' block;
this allows us to remove the 'extern "C"' blocks that our two C++
files that include it are using.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: f463684fbf859e39fcdbd0327a8bcbe8fbcbfab4
      
https://github.com/qemu/qemu/commit/f463684fbf859e39fcdbd0327a8bcbe8fbcbfab4
  Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
  Date:   2021-05-10 (Mon, 10 May 2021)

  Changed paths:
    M hw/arm/imx25_pdk.c

  Log Message:
  -----------
  hw/arm/imx25_pdk: Fix error message for invalid RAM size

The i.MX25 PDK board has 2 banks for SDRAM, each can
address up to 256 MiB. So the total RAM usable for this
board is 512M. When we ask for more we get a misleading
error message:

  $ qemu-system-arm -M imx25-pdk -m 513M
  qemu-system-arm: Invalid RAM size, should be 128 MiB

Update the error message to better match the reality:

  $ qemu-system-arm -M imx25-pdk -m 513M
  qemu-system-arm: RAM size more than 512 MiB is not supported

Fixes: bf350daae02 ("arm/imx25_pdk: drop RAM size fixup")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Message-id: 20210407225608.1882855-1-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: c52c266d24b10f1482602e6d22938d9e21f874f5
      
https://github.com/qemu/qemu/commit/c52c266d24b10f1482602e6d22938d9e21f874f5
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-05-10 (Mon, 10 May 2021)

  Changed paths:
    M include/hw/misc/mps2-scc.h

  Log Message:
  -----------
  hw/misc/mps2-scc: Add "QEMU interface" comment

The MPS2 SCC device doesn't have any documentation of its properties;
add a "QEMU interface" format comment describing them.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210504120912.23094-2-peter.maydell@linaro.org


  Commit: 5bddf92e689c0a3da57f4fd17b83d4eb1e436b80
      
https://github.com/qemu/qemu/commit/5bddf92e689c0a3da57f4fd17b83d4eb1e436b80
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-05-10 (Mon, 10 May 2021)

  Changed paths:
    M hw/misc/mps2-scc.c
    M include/hw/misc/mps2-scc.h

  Log Message:
  -----------
  hw/misc/mps2-scc: Support using CFG0 bit 0 for remapping

On some boards, SCC config register CFG0 bit 0 controls whether
parts of the board memory map are remapped. Support this with:
 * a device property scc-cfg0 so the board can specify the
   initial value of the CFG0 register
 * an outbound GPIO line which tracks bit 0 and which the board
   can wire up to provide the remapping

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210504120912.23094-3-peter.maydell@linaro.org


  Commit: f1dfab0d9b77b8649d60ded3d96870f88d0baccd
      
https://github.com/qemu/qemu/commit/f1dfab0d9b77b8649d60ded3d96870f88d0baccd
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-05-10 (Mon, 10 May 2021)

  Changed paths:
    M docs/system/arm/mps2.rst
    M hw/arm/mps2-tz.c

  Log Message:
  -----------
  hw/arm/mps2-tz: Implement AN524 memory remapping via machine property

The AN524 FPGA image supports two memory maps, which differ in where
the QSPI and BRAM are.  In the default map, the BRAM is at
0x0000_0000, and the QSPI at 0x2800_0000.  In the second map, they
are the other way around.

In hardware, the initial mapping can be selected by the user by
writing either "REMAP: BRAM" (the default) or "REMAP: QSPI" in the
board configuration file.  The board config file is acted on by the
"Motherboard Configuration Controller", which is an entirely separate
microcontroller on the dev board but outside the FPGA.

The guest can also dynamically change the mapping via the SCC
CFG_REG0 register.

Implement this functionality for QEMU, using a machine property
"remap" with valid values "BRAM" and "QSPI" to allow the user to set
the initial mapping, in the same way they can on the FPGA, and
wiring up the bit from the SCC register to also switch the mapping.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210504120912.23094-4-peter.maydell@linaro.org


  Commit: c3080fbdaa381012666428fef2e5f7ce422ecfee
      
https://github.com/qemu/qemu/commit/c3080fbdaa381012666428fef2e5f7ce422ecfee
  Author: Guenter Roeck <linux@roeck-us.net>
  Date:   2021-05-10 (Mon, 10 May 2021)

  Changed paths:
    M hw/arm/xilinx_zynq.c

  Log Message:
  -----------
  hw/arm/xlnx: Fix PHY address for xilinx-zynq-a9

Commit dfc388797cc4 ("hw/arm: xlnx: Set all boards' GEM 'phy-addr'
property value to 23") configured the PHY address for xilinx-zynq-a9
to 23. When trying to boot xilinx-zynq-a9 with zynq-zc702.dtb or
zynq-zc706.dtb, this results in the following error message when
trying to use the Ethernet interface.

macb e000b000.ethernet eth0: Could not attach PHY (-19)

The devicetree files for ZC702 and ZC706 configure PHY address 7. The
documentation for the ZC702 and ZC706 evaluation boards suggest that the
PHY address is 7, not 23. Other boards use PHY address 0, 1, 3, or 7.
I was unable to find a documentation or a devicetree file suggesting
or using PHY address 23. The Ethernet interface starts working with
zynq-zc702.dtb and zynq-zc706.dtb when setting the PHY address to 7,
so let's use it.

Cc: Bin Meng <bin.meng@windriver.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 20210504124140.1100346-1-linux@roeck-us.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: e58c7a3bba3076890592f02d2b0e596bf191b5c2
      
https://github.com/qemu/qemu/commit/e58c7a3bba3076890592f02d2b0e596bf191b5c2
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-05-10 (Mon, 10 May 2021)

  Changed paths:
    M disas/arm-a64.cc
    M disas/nanomips.cpp
    M docs/system/arm/mps2.rst
    M docs/system/arm/sbsa.rst
    M hw/arm/imx25_pdk.c
    M hw/arm/mps2-tz.c
    M hw/arm/xilinx_zynq.c
    M hw/misc/mps2-scc.c
    M hw/sd/omap_mmc.c
    M include/disas/dis-asm.h
    M include/hw/misc/mps2-scc.h
    M include/qemu/bswap.h
    M include/qemu/osdep.h
    M include/sysemu/os-posix.h
    M include/sysemu/os-win32.h
    M linux-user/elfload.c
    M target/arm/helper.c
    M target/arm/meson.build
    M target/arm/op_helper.c
    A target/arm/translate-a32.h
    M target/arm/translate-a64.c
    M target/arm/translate-a64.h
    A target/arm/translate-m-nocp.c
    A target/arm/translate-neon.c
    R target/arm/translate-neon.c.inc
    A target/arm/translate-vfp.c
    R target/arm/translate-vfp.c.inc
    M target/arm/translate.c
    M target/arm/translate.h

  Log Message:
  -----------
  Merge remote-tracking branch 
'remotes/pmaydell/tags/pull-target-arm-20210510-1' into staging

target-arm queue:
 * docs: fix link in sbsa description
 * linux-user/aarch64: Enable hwcap for RND, BTI, and MTE
 * target/arm: Fix tlbbits calculation in tlbi_aa64_vae2is_write()
 * target/arm: Split neon and vfp translation to their own
   compilation units
 * target/arm: Make WFI a NOP for userspace emulators
 * hw/sd/omap_mmc: Use device_cold_reset() instead of
   device_legacy_reset()
 * include: More fixes for 'extern "C"' block use
 * hw/arm/imx25_pdk: Fix error message for invalid RAM size
 * hw/arm/mps2-tz: Implement AN524 memory remapping via machine property
 * hw/arm/xlnx: Fix PHY address for xilinx-zynq-a9

# gpg: Signature made Mon 10 May 2021 17:26:55 BST
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" 
[ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20210510-1: (26 commits)
  hw/arm/xlnx: Fix PHY address for xilinx-zynq-a9
  hw/arm/mps2-tz: Implement AN524 memory remapping via machine property
  hw/misc/mps2-scc: Support using CFG0 bit 0 for remapping
  hw/misc/mps2-scc: Add "QEMU interface" comment
  hw/arm/imx25_pdk: Fix error message for invalid RAM size
  include/disas/dis-asm.h: Handle being included outside 'extern "C"'
  include/qemu/bswap.h: Handle being included outside extern "C" block
  osdep: Make os-win32.h and os-posix.h handle 'extern "C"' themselves
  hw/sd/omap_mmc: Use device_cold_reset() instead of device_legacy_reset()
  target/arm: Make WFI a NOP for userspace emulators
  target/arm: Make translate-neon.c.inc its own compilation unit
  target/arm: Make functions used by translate-neon global
  target/arm: Move NeonGenThreeOpEnvFn typedef to translate.h
  target/arm: Delete unused typedef
  target/arm: Move vfp_reg_ptr() to translate-neon.c.inc
  target/arm: Make translate-vfp.c.inc its own compilation unit
  target/arm: Make functions used by translate-vfp global
  target/arm: Move vfp_{load, store}_reg{32, 64} to translate-vfp.c.inc
  target/arm: Move gen_aa32 functions to translate-a32.h
  target/arm: Split m-nocp trans functions into their own file
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Compare: https://github.com/qemu/qemu/compare/7b15b93a3db8...e58c7a3bba30