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[Qemu-commits] [qemu/qemu] c979d9: linux-user/hexagon: fix signal contex
From: |
Peter Maydell |
Subject: |
[Qemu-commits] [qemu/qemu] c979d9: linux-user/hexagon: fix signal context save & restore |
Date: |
Fri, 06 Jan 2023 04:11:48 -0800 |
Branch: refs/heads/staging
Home: https://github.com/qemu/qemu
Commit: c979d901c8016082cd55a5789998c1cdfa26beef
https://github.com/qemu/qemu/commit/c979d901c8016082cd55a5789998c1cdfa26beef
Author: Mukilan Thiyagarajan <quic_mthiyaga@quicinc.com>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M linux-user/hexagon/signal.c
M tests/tcg/hexagon/Makefile.target
A tests/tcg/hexagon/signal_context.c
Log Message:
-----------
linux-user/hexagon: fix signal context save & restore
This patch fixes the issue originally reported in
this thread:
https://lists.gnu.org/archive/html/qemu-devel/2021-11/msg01102.html
The root cause of the issue is a bug in the hexagon specific
logic for saving & restoring context during signal delivery.
The CPU state has two different representations for the
predicate registers. The current logic saves & restores only
the aliased HEX_REG_P3_O register, which is part of env->gpr[]
field in the CPU state, but not the individual byte-level
predicate registers (pO, p1, p2, p3) backed by env->pred[].
Since all predicated instructions refer only to the
indiviual registers, switching to and back from a signal handler
can clobber these registers if the signal handler writes to them
causing the normal application code to behave unpredictably when
context is restored.
In the reported issue with the 'signals' test, since the updated
hexagon toolchain had built musl with -O2, the functions called
from non_trivial_free were inlined. This meant that the code
emitted reused predicate P0 computed in the entry translation
block of the function non_trivial_free in one of the child TB
as part of an assertion. Since P0 is clobbered by the signal
handler in the signals test, the assertion in non_trivial_free
fails incorectly. Since musl for hexagon implements the 'abort'
function by deliberately writing to memory via null pointer,
this causes the test to fail with segmentation fault.
This patch modifies the signal context save & restore logic
to include the individual p0, p1, p2, p3 and excludes the
32b p3_0 register since its value is derived from the former
registers. It also adds a new test case that reliabily
reproduces the issue for all four predicate registers.
Buglink: https://github.com/quic/toolchain_for_hexagon/issues/6
Signed-off-by: Mukilan Thiyagarajan <quic_mthiyaga@quicinc.com>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Message-Id: <20221229092006.10709-2-quic_mthiyaga@quicinc.com>
Commit: 72895676e73c06a5c331777015b3780efda4edd0
https://github.com/qemu/qemu/commit/72895676e73c06a5c331777015b3780efda4edd0
Author: Mukilan Thiyagarajan <quic_mthiyaga@quicinc.com>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M target/hexagon/cpu.c
M target/hexagon/genptr.c
M target/hexagon/hex_regs.h
Log Message:
-----------
target/hexagon: rename aliased register HEX_REG_P3_0
The patch renames the identifier of the 32bit register
HEX_REG_P3_0 to HEX_REG_P3_0_ALIASED.
This change is to intended to provide some warning that
HEX_REG_P3_0 is an aliased register which has multiple
representations in CPU state and therefore might require
special handling in some contexts. The hope is to prevent
accidental misuse of this register e.g the issue reported
for the signals tests failure [here][1].
[1]: https://lists.gnu.org/archive/html/qemu-devel/2021-11/msg01102.html
Signed-off-by: Mukilan Thiyagarajan <quic_mthiyaga@quicinc.com>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Message-Id: <20221229092006.10709-3-quic_mthiyaga@quicinc.com>
Commit: eaee3b6faf9de49b0cf327df570e1990a3d810cb
https://github.com/qemu/qemu/commit/eaee3b6faf9de49b0cf327df570e1990a3d810cb
Author: Mukilan Thiyagarajan <quic_mthiyaga@quicinc.com>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M tests/tcg/hexagon/mem_noshuf.c
M tests/tcg/hexagon/misc.c
Log Message:
-----------
tests/tcg/hexagon: fix underspecifed asm constraints
There are two test cases where the inline asm doesn't
have the correct constraints causing them to fail.
In misc.c, the 'result' output needs the early clobber
modifier since the rest of the inputs are read after
assignment to the output register.
In mem_noshuf.c, the register r7 is written to but
not specified in the clobber list.
Signed-off-by: Mukilan Thiyagarajan <quic_mthiyaga@quicinc.com>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Message-Id: <20221229081836.12130-1-quic_mthiyaga@quicinc.com>
Commit: aa62435043bb43fdc6826e49e74babab8062c785
https://github.com/qemu/qemu/commit/aa62435043bb43fdc6826e49e74babab8062c785
Author: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M target/hexagon/idef-parser/README.rst
Log Message:
-----------
target/hexagon/idef-parser: fix two typos in README
Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Alessandro Di Federico <ale@rev.ng>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id:
<fe67371e03f9dde38eb7554937da0a96a230730e.1672174122.git.quic_mathbern@quicinc.com>
Commit: 8a9ce0952b1eeb157bd1ba6b02fd7b8c2e9b62a5
https://github.com/qemu/qemu/commit/8a9ce0952b1eeb157bd1ba6b02fd7b8c2e9b62a5
Author: Alessandro Di Federico <ale@rev.ng>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M target/hexagon/idef-parser/idef-parser.y
M target/hexagon/meson.build
Log Message:
-----------
target/hexagon: suppress unused variable warning
This patch manually suppresses a warning for an unused variable
(yynerrs) emitted by bison.
This warning has been triggered for the first time by clang 15.
This patch also disables `-Wextra`, which is not usually adopted in
QEMU. However, clang 15 triggers the warning fixed in this patch even in
absence of `-Wextra`.
Signed-off-by: Alessandro Di Federico <ale@rev.ng>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Tested-by: Taylor Simpson <tsimpson@quicinc.com>
Message-Id: <20221221155327.1504117-1-ale@rev.ng>
Commit: d63aeb3b7ea770dac4ab13eb1e19a943a198a28d
https://github.com/qemu/qemu/commit/d63aeb3b7ea770dac4ab13eb1e19a943a198a28d
Author: Marco Liebel <quic_mliebel@quicinc.com>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M target/hexagon/genptr.c
M tests/tcg/hexagon/Makefile.target
A tests/tcg/hexagon/reg_mut.c
Log Message:
-----------
Hexagon (target/hexagon) implement mutability mask for GPRs
Some registers are defined to have immutable bits, this commit
will implement that behavior.
Signed-off-by: Marco Liebel <quic_mliebel@quicinc.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Message-Id: <20230105102349.2181856-1-quic_mliebel@quicinc.com>
Commit: dc63b1492c2d8140d3b47093700bb9bb52c0d97b
https://github.com/qemu/qemu/commit/dc63b1492c2d8140d3b47093700bb9bb52c0d97b
Author: Alessandro Di Federico <ale@rev.ng>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M scripts/meson-buildoptions.sh
Log Message:
-----------
Update scripts/meson-buildoptions.sh
Note: `Makefile` relies on modification dates in the source tree to
detect changes to `meson_options.txt`. However, git does not track
those. Therefore, the following was necessary to regenerate
`meson-buildoptions.sh`:
touch meson_options.txt
cd "$BUILD_DIR"
make update-buildoptions
Signed-off-by: Alessandro Di Federico <ale@rev.ng>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Message-Id: <20230102104113.3438895-1-ale@rev.ng>
Commit: 171033e8dbac356f9a84c2e7cc8556a4eb0a1359
https://github.com/qemu/qemu/commit/171033e8dbac356f9a84c2e7cc8556a4eb0a1359
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2023-01-06 (Fri, 06 Jan 2023)
Changed paths:
M linux-user/hexagon/signal.c
M scripts/meson-buildoptions.sh
M target/hexagon/cpu.c
M target/hexagon/genptr.c
M target/hexagon/hex_regs.h
M target/hexagon/idef-parser/README.rst
M target/hexagon/idef-parser/idef-parser.y
M target/hexagon/meson.build
M tests/tcg/hexagon/Makefile.target
M tests/tcg/hexagon/mem_noshuf.c
M tests/tcg/hexagon/misc.c
A tests/tcg/hexagon/reg_mut.c
A tests/tcg/hexagon/signal_context.c
Log Message:
-----------
Merge tag 'pull-hex-20230105' of https://github.com/quic/qemu into staging
Hexagon update: patches from several folks
# gpg: Signature made Thu 05 Jan 2023 17:35:27 GMT
# gpg: using RSA key 3635C788CE62B91FD4C59AB47B0244FB12DE4422
# gpg: Good signature from "Taylor Simpson (Rock on) <tsimpson@quicinc.com>"
[unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 3635 C788 CE62 B91F D4C5 9AB4 7B02 44FB 12DE 4422
* tag 'pull-hex-20230105' of https://github.com/quic/qemu:
Update scripts/meson-buildoptions.sh
Hexagon (target/hexagon) implement mutability mask for GPRs
target/hexagon: suppress unused variable warning
target/hexagon/idef-parser: fix two typos in README
tests/tcg/hexagon: fix underspecifed asm constraints
target/hexagon: rename aliased register HEX_REG_P3_0
linux-user/hexagon: fix signal context save & restore
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Compare: https://github.com/qemu/qemu/compare/d365cb0b9d14...171033e8dbac
- [Qemu-commits] [qemu/qemu] c979d9: linux-user/hexagon: fix signal context save & restore,
Peter Maydell <=