[Qemu-devel] [PULL 039/118] target-ppc: Introduce DFP Test Significance

[Alexander Graf]

From: Tom Musta <address@hidden>

Add emulation of the PowerPC Decimal Floating Point Test Significance
instructions dtstsf[q][.].

Signed-off-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
 target-ppc/dfp_helper.c | 35 +++++++++++++++++++++++++++++++++++
 target-ppc/helper.h     |  2 ++
 target-ppc/translate.c  |  4 ++++
 3 files changed, 41 insertions(+)

diff --git a/target-ppc/dfp_helper.c b/target-ppc/dfp_helper.c
index 43eb70d..574956a 100644
--- a/target-ppc/dfp_helper.c
+++ b/target-ppc/dfp_helper.c
@@ -536,3 +536,38 @@ uint32_t helper_##op(CPUPPCState *env, uint64_t *a, 
uint64_t *b)         \
 
 DFP_HELPER_TSTEX(dtstex, 64)
 DFP_HELPER_TSTEX(dtstexq, 128)
+
+#define DFP_HELPER_TSTSF(op, size)                                       \
+uint32_t helper_##op(CPUPPCState *env, uint64_t *a, uint64_t *b)         \
+{                                                                        \
+    struct PPC_DFP dfp;                                                  \
+    unsigned k;                                                          \
+                                                                         \
+    dfp_prepare_decimal##size(&dfp, 0, b, env);                          \
+                                                                         \
+    k = *a & 0x3F;                                                       \
+                                                                         \
+    if (unlikely(decNumberIsSpecial(&dfp.b))) {                          \
+        dfp.crbf = 1;                                                    \
+    } else if (k == 0) {                                                 \
+        dfp.crbf = 4;                                                    \
+    } else if (unlikely(decNumberIsZero(&dfp.b))) {                      \
+        /* Zero has no sig digits */                                     \
+        dfp.crbf = 4;                                                    \
+    } else {                                                             \
+        unsigned nsd = dfp.b.digits;                                     \
+        if (k < nsd) {                                                   \
+            dfp.crbf = 8;                                                \
+        } else if (k > nsd) {                                            \
+            dfp.crbf = 4;                                                \
+        } else {                                                         \
+            dfp.crbf = 2;                                                \
+        }                                                                \
+    }                                                                    \
+                                                                         \
+    dfp_set_FPCC_from_CRBF(&dfp);                                        \
+    return dfp.crbf;                                                     \
+}
+
+DFP_HELPER_TSTSF(dtstsf, 64)
+DFP_HELPER_TSTSF(dtstsfq, 128)
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 8ffb806..2b39d2a 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -634,3 +634,5 @@ DEF_HELPER_3(dtstdg, i32, env, fprp, i32)
 DEF_HELPER_3(dtstdgq, i32, env, fprp, i32)
 DEF_HELPER_3(dtstex, i32, env, fprp, fprp)
 DEF_HELPER_3(dtstexq, i32, env, fprp, fprp)
+DEF_HELPER_3(dtstsf, i32, env, fprp, fprp)
+DEF_HELPER_3(dtstsfq, i32, env, fprp, fprp)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index dbb56ab..441eea1 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -8373,6 +8373,8 @@ GEN_DFP_BF_A_DCM(dtstdg)
 GEN_DFP_BF_A_DCM(dtstdgq)
 GEN_DFP_BF_A_B(dtstex)
 GEN_DFP_BF_A_B(dtstexq)
+GEN_DFP_BF_A_B(dtstsf)
+GEN_DFP_BF_A_B(dtstsfq)
 /***                           SPE extension                               ***/
 /* Register moves */
 
@@ -11318,6 +11320,8 @@ GEN_DFP_BF_A_DCM(dtstdg, 0x02, 0x07),
 GEN_DFP_BF_Ap_DCM(dtstdgq, 0x02, 0x07),
 GEN_DFP_BF_A_B(dtstex, 0x02, 0x05),
 GEN_DFP_BF_Ap_Bp(dtstexq, 0x02, 0x05),
+GEN_DFP_BF_A_B(dtstsf, 0x02, 0x15),
+GEN_DFP_BF_A_Bp(dtstsfq, 0x02, 0x15),
 #undef GEN_SPE
 #define GEN_SPE(name0, name1, opc2, opc3, inval0, inval1, type) \
     GEN_OPCODE_DUAL(name0##_##name1, 0x04, opc2, opc3, inval0, inval1, type, 
PPC_NONE)
-- 
1.8.1.4