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Re: [PATCH 16/20] target/arm: Fix sve_zip_p vs odd vector lengths
From: |
Richard Henderson |
Subject: |
Re: [PATCH 16/20] target/arm: Fix sve_zip_p vs odd vector lengths |
Date: |
Fri, 28 Aug 2020 12:26:12 -0700 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 |
On 8/25/20 6:49 AM, Peter Maydell wrote:
> On Sat, 15 Aug 2020 at 02:32, Richard Henderson
> <richard.henderson@linaro.org> wrote:
>>
>> Wrote too much with low-half zip (zip1) with vl % 512 != 0.
>>
>> Adjust all of the x + (y << s) to x | (y << s) as a style fix.
>>
>> Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>> target/arm/sve_helper.c | 25 ++++++++++++++-----------
>> 1 file changed, 14 insertions(+), 11 deletions(-)
>>
>> diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c
>> index fcb46f150f..b8651ae173 100644
>> --- a/target/arm/sve_helper.c
>> +++ b/target/arm/sve_helper.c
>> @@ -1870,6 +1870,7 @@ void HELPER(sve_zip_p)(void *vd, void *vn, void *vm,
>> uint32_t pred_desc)
>> intptr_t oprsz = extract32(pred_desc, 0, SIMD_OPRSZ_BITS) + 2;
>> int esz = extract32(pred_desc, SIMD_DATA_SHIFT, 2);
>> intptr_t high = extract32(pred_desc, SIMD_DATA_SHIFT + 2, 1);
>> + int esize = 1 << esz;
>> uint64_t *d = vd;
>> intptr_t i;
>>
>> @@ -1882,33 +1883,35 @@ void HELPER(sve_zip_p)(void *vd, void *vn, void *vm,
>> uint32_t pred_desc)
>> mm = extract64(mm, high * half, half);
>> nn = expand_bits(nn, esz);
>> mm = expand_bits(mm, esz);
>> - d[0] = nn + (mm << (1 << esz));
>> + d[0] = nn | (mm << esize);
>> } else {
>> - ARMPredicateReg tmp_n, tmp_m;
>> + ARMPredicateReg tmp;
>>
>> /* We produce output faster than we consume input.
>> Therefore we must be mindful of possible overlap. */
>> - if ((vn - vd) < (uintptr_t)oprsz) {
>> - vn = memcpy(&tmp_n, vn, oprsz);
>> - }
>> - if ((vm - vd) < (uintptr_t)oprsz) {
>> - vm = memcpy(&tmp_m, vm, oprsz);
>> + if (vd == vn) {
>> + vn = memcpy(&tmp, vn, oprsz);
>> + if (vd == vm) {
>> + vm = vn;
>> + }
>> + } else if (vd == vm) {
>> + vm = memcpy(&tmp, vm, oprsz);
>
> Why is it OK to only check vd==vn etc rather than checking for
> overlap the way the old code did ? The commit message doesn't
> mention this.
We only ever pass pred_full_reg_offset, so there will only ever be exact
overlap. I can either split this out as a separate change or simply add it to
the patch description.
r~
- [PATCH 00/20] target/arm: SVE2 preparatory patches, Richard Henderson, 2020/08/15
- [PATCH 01/20] qemu/int128: Add int128_lshift, Richard Henderson, 2020/08/15
- [PATCH 20/20] target/arm: Convert sq{, r}dmulh to gvec for aa64 advsimd, Richard Henderson, 2020/08/15
- [PATCH 13/20] target/arm: Tidy SVE tszimm shift formats, Richard Henderson, 2020/08/15
- [PATCH 09/20] target/arm: Merge helper_sve_clr_* and helper_sve_movz_*, Richard Henderson, 2020/08/15
- [PATCH 07/20] target/arm: Use tcg_gen_gvec_bitsel for trans_SEL_pppp, Richard Henderson, 2020/08/15