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Re: [PATCH 13/20] target/arm: Tidy SVE tszimm shift formats
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From: |
Peter Maydell |
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Subject: |
Re: [PATCH 13/20] target/arm: Tidy SVE tszimm shift formats |
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Date: |
Tue, 25 Aug 2020 12:18:04 +0100 |
On Sat, 15 Aug 2020 at 02:32, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Rather than require the user to fill in the immediate (shl or shr),
> create full formats that include the immediate.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/arm/sve.decode | 35 ++++++++++++++++-------------------
> 1 file changed, 16 insertions(+), 19 deletions(-)
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
thanks
-- PMM
- Re: [PATCH 02/20] target/arm: Split out gen_gvec_fn_zz, (continued)
- [PATCH 06/20] target/arm: Clean up 4-operand predicate expansion, Richard Henderson, 2020/08/15
- [PATCH 16/20] target/arm: Fix sve_zip_p vs odd vector lengths, Richard Henderson, 2020/08/15
- [PATCH 01/20] qemu/int128: Add int128_lshift, Richard Henderson, 2020/08/15
- [PATCH 20/20] target/arm: Convert sq{, r}dmulh to gvec for aa64 advsimd, Richard Henderson, 2020/08/15
- [PATCH 13/20] target/arm: Tidy SVE tszimm shift formats, Richard Henderson, 2020/08/15
- Re: [PATCH 13/20] target/arm: Tidy SVE tszimm shift formats,
Peter Maydell <=
- [PATCH 09/20] target/arm: Merge helper_sve_clr_* and helper_sve_movz_*, Richard Henderson, 2020/08/15
- [PATCH 07/20] target/arm: Use tcg_gen_gvec_bitsel for trans_SEL_pppp, Richard Henderson, 2020/08/15
- [PATCH 08/20] target/arm: Split out gen_gvec_ool_zzzp, Richard Henderson, 2020/08/15
- [PATCH 17/20] target/arm: Fix sve_punpk_p vs odd vector lengths, Richard Henderson, 2020/08/15
- [PATCH 19/20] target/arm: Convert integer multiply-add (indexed) to gvec for aa64 advsimd, Richard Henderson, 2020/08/15