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[PULL 00/47] target-arm queue
From: |
Peter Maydell |
Subject: |
[PULL 00/47] target-arm queue |
Date: |
Tue, 1 Sep 2020 16:17:36 +0100 |
Just my fp16 work, plus some small stuff for the sbsa-ref board;
but my rule of thumb is to send a pullreq once I get over about
30 patches...
-- PMM
The following changes since commit 2f4c51c0f384d7888a04b4815861e6d5fd244d75:
Merge remote-tracking branch 'remotes/kraxel/tags/usb-20200831-pull-request'
into staging (2020-08-31 19:39:13 +0100)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20200901
for you to fetch changes up to 3f462bf0f6ea6382dd1502d4eb1fcd33c8e774f5:
hw/arm/sbsa-ref : Add embedded controller in secure memory (2020-09-01
14:01:34 +0100)
----------------------------------------------------------------
target-arm queue:
* Implement fp16 support for AArch32 VFP and Neon
* hw/arm/sbsa-ref: add "reg" property to DT cpu nodes
* hw/arm/sbsa-ref : Add embedded controller in secure memory
----------------------------------------------------------------
Graeme Gregory (2):
hw/misc/sbsa_ec : Add an embedded controller for sbsa-ref
hw/arm/sbsa-ref : Add embedded controller in secure memory
Leif Lindholm (1):
hw/arm/sbsa-ref: add "reg" property to DT cpu nodes
Peter Maydell (44):
target/arm: Remove local definitions of float constants
target/arm: Use correct ID register check for aa32_fp16_arith
target/arm: Implement VFP fp16 for VFP_BINOP operations
target/arm: Implement VFP fp16 VMLA, VMLS, VNMLS, VNMLA, VNMUL
target/arm: Macroify trans functions for VFMA, VFMS, VFNMA, VFNMS
target/arm: Implement VFP fp16 for fused-multiply-add
target/arm: Macroify uses of do_vfp_2op_sp() and do_vfp_2op_dp()
target/arm: Implement VFP fp16 for VABS, VNEG, VSQRT
target/arm: Implement VFP fp16 for VMOV immediate
target/arm: Implement VFP fp16 VCMP
target/arm: Implement VFP fp16 VLDR and VSTR
target/arm: Implement VFP fp16 VCVT between float and integer
target/arm: Make VFP_CONV_FIX macros take separate float type and float
size
target/arm: Use macros instead of open-coding fp16 conversion helpers
target/arm: Implement VFP fp16 VCVT between float and fixed-point
target/arm: Implement VFP vp16 VCVT-with-specified-rounding-mode
target/arm: Implement VFP fp16 VSEL
target/arm: Implement VFP fp16 VRINT*
target/arm: Implement new VFP fp16 insn VINS
target/arm: Implement new VFP fp16 insn VMOVX
target/arm: Implement VFP fp16 VMOV between gp and halfprec registers
target/arm: Implement FP16 for Neon VADD, VSUB, VABD, VMUL
target/arm: Implement fp16 for Neon VRECPE, VRSQRTE using gvec
target/arm: Implement fp16 for Neon VABS, VNEG of floats
target/arm: Implement fp16 for VCEQ, VCGE, VCGT comparisons
target/arm: Implement fp16 for VACGE, VACGT
target/arm: Implement fp16 for Neon VMAX, VMIN
target/arm: Implement fp16 for Neon VMAXNM, VMINNM
target/arm: Implement fp16 for Neon VMLA, VMLS operations
target/arm: Implement fp16 for Neon VFMA, VMFS
target/arm: Implement fp16 for Neon fp compare-vs-0
target/arm: Implement fp16 for Neon VRECPS
target/arm: Implement fp16 for Neon VRSQRTS
target/arm: Implement fp16 for Neon pairwise fp ops
target/arm: Implement fp16 for Neon float-integer VCVT
target/arm: Convert Neon VCVT fixed-point to gvec
target/arm: Implement fp16 for Neon VCVT fixed-point
target/arm: Implement fp16 for Neon VCVT with rounding modes
target/arm: Implement fp16 for Neon VRINT-with-specified-rounding-mode
target/arm: Implement fp16 for Neon VRINTX
target/arm/vec_helper: Handle oprsz less than 16 bytes in indexed
operations
target/arm/vec_helper: Add gvec fp indexed multiply-and-add operations
target/arm: Implement fp16 for Neon VMUL, VMLA, VMLS
target/arm: Enable FP16 in '-cpu max'
target/arm/cpu.h | 7 +-
target/arm/helper.h | 133 ++++++-
target/arm/neon-dp.decode | 8 +-
target/arm/vfp-uncond.decode | 27 +-
target/arm/vfp.decode | 34 +-
hw/arm/sbsa-ref.c | 43 ++-
hw/misc/sbsa_ec.c | 98 +++++
target/arm/cpu.c | 3 +-
target/arm/cpu64.c | 10 +-
target/arm/helper-a64.c | 11 -
target/arm/translate-sve.c | 4 -
target/arm/vec_helper.c | 431 ++++++++++++++++++++-
target/arm/vfp_helper.c | 244 +++++-------
hw/misc/meson.build | 2 +
target/arm/translate-neon.c.inc | 755 +++++++++++++------------------------
target/arm/translate-vfp.c.inc | 810 ++++++++++++++++++++++++++++++++++++----
16 files changed, 1819 insertions(+), 801 deletions(-)
create mode 100644 hw/misc/sbsa_ec.c
- [PULL 00/47] target-arm queue,
Peter Maydell <=
- [PULL 01/47] target/arm: Remove local definitions of float constants, Peter Maydell, 2020/09/01
- [PULL 02/47] target/arm: Use correct ID register check for aa32_fp16_arith, Peter Maydell, 2020/09/01
- [PULL 03/47] target/arm: Implement VFP fp16 for VFP_BINOP operations, Peter Maydell, 2020/09/01
- [PULL 05/47] target/arm: Macroify trans functions for VFMA, VFMS, VFNMA, VFNMS, Peter Maydell, 2020/09/01
- [PULL 04/47] target/arm: Implement VFP fp16 VMLA, VMLS, VNMLS, VNMLA, VNMUL, Peter Maydell, 2020/09/01
- [PULL 06/47] target/arm: Implement VFP fp16 for fused-multiply-add, Peter Maydell, 2020/09/01
- [PULL 08/47] target/arm: Implement VFP fp16 for VABS, VNEG, VSQRT, Peter Maydell, 2020/09/01
- [PULL 07/47] target/arm: Macroify uses of do_vfp_2op_sp() and do_vfp_2op_dp(), Peter Maydell, 2020/09/01
- [PULL 09/47] target/arm: Implement VFP fp16 for VMOV immediate, Peter Maydell, 2020/09/01
- [PULL 10/47] target/arm: Implement VFP fp16 VCMP, Peter Maydell, 2020/09/01