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[PATCH 23/24] vt82c686: Add VT8231_SUPERIO based on VIA_SUPERIO
From: |
BALATON Zoltan |
Subject: |
[PATCH 23/24] vt82c686: Add VT8231_SUPERIO based on VIA_SUPERIO |
Date: |
Sat, 02 Jan 2021 11:43:35 +0100 |
The VT8231 south bridge is very similar to VT82C686B but there are
some differences in register addresses and functionality, e.g. the
VT8231 only has one serial port. This commit adds VT8231_SUPERIO
subclass based on the abstract VIA_SUPERIO class to emulate the
superio part of VT8231.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
hw/isa/vt82c686.c | 121 ++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 121 insertions(+)
diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
index a755896b8e..0390782d1d 100644
--- a/hw/isa/vt82c686.c
+++ b/hw/isa/vt82c686.c
@@ -489,6 +489,126 @@ static const TypeInfo vt82c686b_superio_info = {
};
+#define TYPE_VT8231_SUPERIO "vt8231-superio"
+
+static void vt8231_superio_cfg_write(void *opaque, hwaddr addr,
+ uint64_t data, unsigned size)
+{
+ ViaSuperIOState *sc = opaque;
+ uint8_t idx = sc->regs[0];
+
+ if (addr == 0) { /* config index register */
+ sc->regs[0] = data;
+ return;
+ }
+
+ /* config data register */
+ trace_via_superio_write(idx, data);
+ switch (idx) {
+ case 0x00 ... 0xdf:
+ case 0xe7 ... 0xef:
+ case 0xf0 ... 0xf1:
+ case 0xf5:
+ case 0xf8:
+ case 0xfd:
+ /* ignore write to read only registers */
+ return;
+ case 0xf2: /* Function select */
+ {
+ data &= 0x17;
+ if (data & BIT(2)) { /* Serial port enable */
+ ISADevice *dev = sc->superio.serial[0];
+ if (!memory_region_is_mapped(sc->serial_io[0])) {
+ memory_region_add_subregion(isa_address_space_io(dev),
+ dev->ioport_id, sc->serial_io[0]);
+ }
+ } else {
+ MemoryRegion *io = isa_address_space_io(sc->superio.serial[0]);
+ if (memory_region_is_mapped(sc->serial_io[0])) {
+ memory_region_del_subregion(io, sc->serial_io[0]);
+ }
+ }
+ break;
+ }
+ case 0xf4: /* Serial port io base address */
+ {
+ data &= 0xfe;
+ sc->superio.serial[0]->ioport_id = data << 2;
+ if (memory_region_is_mapped(sc->serial_io[0])) {
+ memory_region_set_address(sc->serial_io[0], data << 2);
+ }
+ break;
+ }
+ default:
+ qemu_log_mask(LOG_UNIMP,
+ "via_superio_cfg: unimplemented register 0x%x\n", idx);
+ break;
+ }
+ sc->regs[idx] = data;
+}
+
+static const MemoryRegionOps vt8231_superio_cfg_ops = {
+ .read = via_superio_cfg_read,
+ .write = vt8231_superio_cfg_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .impl = {
+ .min_access_size = 1,
+ .max_access_size = 1,
+ },
+};
+
+static void vt8231_superio_reset(DeviceState *dev)
+{
+ ViaSuperIOState *s = VIA_SUPERIO(dev);
+
+ memset(s->regs, 0, sizeof(s->regs));
+ /* Device ID */
+ s->regs[0xf0] = 0x3c;
+ /* Device revision */
+ s->regs[0xf1] = 0x01;
+ /* Function select - all disabled */
+ vt8231_superio_cfg_write(s, 0, 0xf2, 1);
+ vt8231_superio_cfg_write(s, 1, 0x03, 1);
+ /* Serial port base addr */
+ vt8231_superio_cfg_write(s, 0, 0xf4, 1);
+ vt8231_superio_cfg_write(s, 1, 0xfe, 1);
+ /* Parallel port base addr */
+ vt8231_superio_cfg_write(s, 0, 0xf6, 1);
+ vt8231_superio_cfg_write(s, 1, 0xde, 1);
+ /* Floppy ctrl base addr */
+ vt8231_superio_cfg_write(s, 0, 0xf7, 1);
+ vt8231_superio_cfg_write(s, 1, 0xfc, 1);
+
+ vt8231_superio_cfg_write(s, 0, 0, 1);
+}
+
+static void vt8231_superio_init(Object *obj)
+{
+ VIA_SUPERIO(obj)->io_ops = &vt8231_superio_cfg_ops;
+}
+
+static void vt8231_superio_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass);
+
+ dc->reset = vt8231_superio_reset;
+ sc->serial.count = 1;
+ sc->parallel.count = 1;
+ sc->ide.count = 0; /* emulated by via-ide */
+ sc->floppy.count = 1;
+}
+
+static const TypeInfo vt8231_superio_info = {
+ .name = TYPE_VT8231_SUPERIO,
+ .parent = TYPE_VIA_SUPERIO,
+ .instance_size = sizeof(ViaSuperIOState),
+ .instance_init = vt8231_superio_init,
+ .class_size = sizeof(ISASuperIOClass),
+ .class_init = vt8231_superio_class_init,
+};
+
+
OBJECT_DECLARE_SIMPLE_TYPE(VT82C686BISAState, VT82C686B_ISA)
struct VT82C686BISAState {
@@ -612,6 +732,7 @@ static void vt82c686b_register_types(void)
type_register_static(&vt8231_pm_info);
type_register_static(&via_superio_info);
type_register_static(&vt82c686b_superio_info);
+ type_register_static(&vt8231_superio_info);
type_register_static(&via_info);
}
--
2.21.3
- [PATCH 09/24] vt82c686: Convert debug printf to trace points, (continued)
- [PATCH 09/24] vt82c686: Convert debug printf to trace points, BALATON Zoltan, 2021/01/02
- [PATCH 02/24] vt82c686: Remove unnecessary _DEVICE suffix from type macros, BALATON Zoltan, 2021/01/02
- [PATCH 05/24] vt82c686: Split off via-[am]c97 into separate file in hw/audio, BALATON Zoltan, 2021/01/02
- [PATCH 10/24] vt82c686: Remove unneeded includes and defines, BALATON Zoltan, 2021/01/02
- [PATCH 11/24] vt82c686: Use shorter name for local variable holding object state, BALATON Zoltan, 2021/01/02
- [PATCH 13/24] vt82c686: Move superio memory region to SuperIOConfig struct, BALATON Zoltan, 2021/01/02
- [PATCH 21/24] vt82c686: Implement control of serial port io ranges via config regs, BALATON Zoltan, 2021/01/02
- [PATCH 20/24] vt82c686: Fix superio_cfg_{read,write}() functions, BALATON Zoltan, 2021/01/02
- [PATCH 23/24] vt82c686: Add VT8231_SUPERIO based on VIA_SUPERIO,
BALATON Zoltan <=
- [PATCH 18/24] vt82c686: Simplify vt82c686b_realize(), BALATON Zoltan, 2021/01/02
- [PATCH 15/24] vt82c686: Fix SMBus IO base and configuration registers, BALATON Zoltan, 2021/01/02
- [PATCH 17/24] vt82c686: Make vt82c686b-pm an abstract base class and add vt8231-pm based on it, BALATON Zoltan, 2021/01/02
- [PATCH 14/24] vt82c686: Reorganise code, BALATON Zoltan, 2021/01/02
- [PATCH 19/24] vt82c686: Move creation of ISA devices to the ISA bridge, BALATON Zoltan, 2021/01/02
- [PATCH 12/24] vt82c686: Rename superio config related parts, BALATON Zoltan, 2021/01/02
- [PATCH 16/24] vt82c686: Fix up power management io base and config, BALATON Zoltan, 2021/01/02
- [PATCH 24/24] vt82c686: Add emulation of VT8231 south bridge, BALATON Zoltan, 2021/01/02
- [PATCH 22/24] vt82c686: QOM-ify superio related functionality, BALATON Zoltan, 2021/01/02