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[PULL 17/66] target/mips/mips-defs: Rename ISA_MIPS32R5 as ISA_MIPS_R5
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 17/66] target/mips/mips-defs: Rename ISA_MIPS32R5 as ISA_MIPS_R5 |
Date: |
Thu, 7 Jan 2021 23:22:04 +0100 |
The MIPS ISA release 5 is common to 32/64-bit CPUs.
To avoid holes in the insn_flags type, update the
definition with the next available bit.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210104221154.3127610-15-f4bug@amsat.org>
---
target/mips/mips-defs.h | 4 ++--
target/mips/translate.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h
index 12ff2b3280c..181f3715472 100644
--- a/target/mips/mips-defs.h
+++ b/target/mips/mips-defs.h
@@ -19,7 +19,7 @@
#define ISA_MIPS_R1 0x0000000000000020ULL
#define ISA_MIPS_R2 0x0000000000000040ULL
#define ISA_MIPS_R3 0x0000000000000080ULL
-#define ISA_MIPS32R5 0x0000000000000800ULL
+#define ISA_MIPS_R5 0x0000000000000100ULL
#define ISA_MIPS32R6 0x0000000000002000ULL
#define ISA_NANOMIPS32 0x0000000000008000ULL
/*
@@ -81,7 +81,7 @@
#define CPU_MIPS64R3 (CPU_MIPS64R2 | CPU_MIPS32R3)
/* MIPS Technologies "Release 5" */
-#define CPU_MIPS32R5 (CPU_MIPS32R3 | ISA_MIPS32R5)
+#define CPU_MIPS32R5 (CPU_MIPS32R3 | ISA_MIPS_R5)
#define CPU_MIPS64R5 (CPU_MIPS64R3 | CPU_MIPS32R5)
/* MIPS Technologies "Release 6" */
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 9c71d306ee5..83fd6c473a5 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -10993,7 +10993,7 @@ static void gen_cp0(CPUMIPSState *env, DisasContext
*ctx, uint32_t opc,
if (ctx->opcode & (1 << bit_shift)) {
/* OPC_ERETNC */
opn = "eretnc";
- check_insn(ctx, ISA_MIPS32R5);
+ check_insn(ctx, ISA_MIPS_R5);
gen_helper_eretnc(cpu_env);
} else {
/* OPC_ERET */
--
2.26.2
- [PULL 07/66] target/mips/mips-defs: Introduce CPU_MIPS64 and cpu_type_is_64bit(), (continued)
- [PULL 07/66] target/mips/mips-defs: Introduce CPU_MIPS64 and cpu_type_is_64bit(), Philippe Mathieu-Daudé, 2021/01/07
- [PULL 08/66] hw/mips/boston: Check 64-bit support with cpu_type_is_64bit(), Philippe Mathieu-Daudé, 2021/01/07
- [PULL 09/66] target/mips/mips-defs: Use ISA_MIPS32 definition to check Release 1, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 10/66] target/mips/mips-defs: Use ISA_MIPS32R2 definition to check Release 2, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 11/66] target/mips/mips-defs: Use ISA_MIPS32R3 definition to check Release 3, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 12/66] target/mips/mips-defs: Use ISA_MIPS32R5 definition to check Release 5, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 13/66] target/mips/mips-defs: Use ISA_MIPS32R6 definition to check Release 6, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 14/66] target/mips/mips-defs: Rename ISA_MIPS32 as ISA_MIPS_R1, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 16/66] target/mips/mips-defs: Rename ISA_MIPS32R3 as ISA_MIPS_R3, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 15/66] target/mips/mips-defs: Rename ISA_MIPS32R2 as ISA_MIPS_R2, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 17/66] target/mips/mips-defs: Rename ISA_MIPS32R5 as ISA_MIPS_R5,
Philippe Mathieu-Daudé <=
- [PULL 18/66] target/mips/mips-defs: Rename ISA_MIPS32R6 as ISA_MIPS_R6, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 19/66] target/mips: Inline cpu_state_reset() in mips_cpu_reset(), Philippe Mathieu-Daudé, 2021/01/07
- [PULL 20/66] target/mips: Extract FPU helpers to 'fpu_helper.h', Philippe Mathieu-Daudé, 2021/01/07
- [PULL 21/66] target/mips: Add !CONFIG_USER_ONLY comment after #endif, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 22/66] target/mips: Remove consecutive CONFIG_USER_ONLY ifdefs, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 23/66] target/mips: Move common helpers from helper.c to cpu.c, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 24/66] target/mips: Rename helper.c as tlb_helper.c, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 25/66] target/mips: Fix code style for checkpatch.pl, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 26/66] target/mips: Move mmu_init() functions to tlb_helper.c, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 27/66] target/mips: Rename translate_init.c as cpu-defs.c, Philippe Mathieu-Daudé, 2021/01/07