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[PULL 30/66] target/mips: Replace gen_exception_err(err=0) by gen_except
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 30/66] target/mips: Replace gen_exception_err(err=0) by gen_exception_end() |
Date: |
Thu, 7 Jan 2021 23:22:17 +0100 |
generate_exception_err(err=0) is simply generate_exception_end().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201214183739.500368-11-f4bug@amsat.org>
---
target/mips/translate.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 5889d24eb65..445858591a4 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -2898,7 +2898,7 @@ static inline void gen_move_high32(TCGv ret, TCGv_i64 arg)
static inline void check_cp0_enabled(DisasContext *ctx)
{
if (unlikely(!(ctx->hflags & MIPS_HFLAG_CP0))) {
- generate_exception_err(ctx, EXCP_CpU, 0);
+ generate_exception_end(ctx, EXCP_CpU);
}
}
@@ -3104,10 +3104,10 @@ static inline void check_mt(DisasContext *ctx)
static inline void check_cp0_mt(DisasContext *ctx)
{
if (unlikely(!(ctx->hflags & MIPS_HFLAG_CP0))) {
- generate_exception_err(ctx, EXCP_CpU, 0);
+ generate_exception_end(ctx, EXCP_CpU);
} else {
if (unlikely(!(ctx->CP0_Config3 & (1 << CP0C3_MT)))) {
- generate_exception_err(ctx, EXCP_RI, 0);
+ generate_exception_end(ctx, EXCP_RI);
}
}
}
--
2.26.2
- [PULL 20/66] target/mips: Extract FPU helpers to 'fpu_helper.h', (continued)
- [PULL 20/66] target/mips: Extract FPU helpers to 'fpu_helper.h', Philippe Mathieu-Daudé, 2021/01/07
- [PULL 21/66] target/mips: Add !CONFIG_USER_ONLY comment after #endif, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 22/66] target/mips: Remove consecutive CONFIG_USER_ONLY ifdefs, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 23/66] target/mips: Move common helpers from helper.c to cpu.c, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 24/66] target/mips: Rename helper.c as tlb_helper.c, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 25/66] target/mips: Fix code style for checkpatch.pl, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 26/66] target/mips: Move mmu_init() functions to tlb_helper.c, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 27/66] target/mips: Rename translate_init.c as cpu-defs.c, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 28/66] target/mips/translate: Extract DisasContext structure, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 29/66] target/mips/translate: Add declarations for generic code, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 30/66] target/mips: Replace gen_exception_err(err=0) by gen_exception_end(),
Philippe Mathieu-Daudé <=
- [PULL 31/66] target/mips: Replace gen_exception_end(EXCP_RI) by gen_rsvd_instruction, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 32/66] target/mips: Declare generic FPU functions in 'translate.h', Philippe Mathieu-Daudé, 2021/01/07
- [PULL 33/66] target/mips: Extract FPU specific definitions to translate.h, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 34/66] target/mips: Only build TCG code when CONFIG_TCG is set, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 35/66] target/mips/translate: Extract decode_opc_legacy() from decode_opc(), Philippe Mathieu-Daudé, 2021/01/07
- [PULL 36/66] target/mips/translate: Expose check_mips_64() to 32-bit mode, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 37/66] target/mips: Introduce ase_msa_available() helper, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 38/66] target/mips: Simplify msa_reset(), Philippe Mathieu-Daudé, 2021/01/07
- [PULL 39/66] target/mips: Use CP0_Config3 to set MIPS_HFLAG_MSA, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 40/66] target/mips: Simplify MSA TCG logic, Philippe Mathieu-Daudé, 2021/01/07