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[PULL 60/66] target/mips: Convert Rel6 CACHE/PREF opcodes to decodetree
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 60/66] target/mips: Convert Rel6 CACHE/PREF opcodes to decodetree |
Date: |
Thu, 7 Jan 2021 23:22:47 +0100 |
CACHE/PREF opcodes have been removed from the Release 6.
Add a single decodetree entry for the opcodes, triggering
Reserved Instruction if ever used.
Remove unreachable check_insn_opc_removed() calls.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201208203704.243704-9-f4bug@amsat.org>
---
target/mips/mips32r6.decode | 3 +++
target/mips/translate.c | 2 --
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/target/mips/mips32r6.decode b/target/mips/mips32r6.decode
index 7b12a1bff25..e3b3934539a 100644
--- a/target/mips/mips32r6.decode
+++ b/target/mips/mips32r6.decode
@@ -19,3 +19,6 @@ LSA 000000 ..... ..... ..... 000 .. 000101
@lsa
REMOVED 010011 ----- ----- ----- ----- ------ # COP1X (COP3)
REMOVED 011100 ----- ----- ----- ----- ------ # SPECIAL2
+
+REMOVED 101111 ----- ----- ---------------- # CACHE
+REMOVED 110011 ----- ----- ---------------- # PREF
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 52397bce84b..e8389738c57 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -28620,7 +28620,6 @@ static bool decode_opc_legacy(CPUMIPSState *env,
DisasContext *ctx)
gen_st_cond(ctx, rt, rs, imm, MO_TESL, false);
break;
case OPC_CACHE:
- check_insn_opc_removed(ctx, ISA_MIPS_R6);
check_cp0_enabled(ctx);
check_insn(ctx, ISA_MIPS3 | ISA_MIPS_R1);
if (ctx->hflags & MIPS_HFLAG_ITC_CACHE) {
@@ -28629,7 +28628,6 @@ static bool decode_opc_legacy(CPUMIPSState *env,
DisasContext *ctx)
/* Treat as NOP. */
break;
case OPC_PREF:
- check_insn_opc_removed(ctx, ISA_MIPS_R6);
if (ctx->insn_flags & INSN_R5900) {
/* Treat as NOP. */
} else {
--
2.26.2
- [PULL 50/66] target/mips: Extract MSA translation routines, (continued)
- [PULL 50/66] target/mips: Extract MSA translation routines, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 51/66] target/mips: Pass TCGCond argument to MSA gen_check_zero_element(), Philippe Mathieu-Daudé, 2021/01/07
- [PULL 52/66] target/mips: Introduce decode tree bindings for MSA ASE, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 53/66] target/mips: Use decode_ase_msa() generated from decodetree, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 54/66] target/mips: Extract LSA/DLSA translation generators, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 55/66] target/mips: Introduce decodetree helpers for MSA LSA/DLSA opcodes, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 56/66] target/mips: Introduce decodetree helpers for Release6 LSA/DLSA opcodes, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 57/66] target/mips: Remove now unreachable LSA/DLSA opcodes code, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 58/66] target/mips: Convert Rel6 Special2 opcode to decodetree, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 59/66] target/mips: Convert Rel6 COP1X opcode to decodetree, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 60/66] target/mips: Convert Rel6 CACHE/PREF opcodes to decodetree,
Philippe Mathieu-Daudé <=
- [PULL 61/66] target/mips: Convert Rel6 LWL/LWR/SWL/SWR opcodes to decodetree, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 62/66] target/mips: Convert Rel6 LWLE/LWRE/SWLE/SWRE opcodes to decodetree, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 63/66] target/mips: Convert Rel6 LDL/LDR/SDL/SDR opcodes to decodetree, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 64/66] target/mips: Convert Rel6 LLD/SCD opcodes to decodetree, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 65/66] target/mips: Convert Rel6 LL/SC opcodes to decodetree, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 66/66] docs/system: Remove deprecated 'fulong2e' machine alias, Philippe Mathieu-Daudé, 2021/01/07
- Re: [PULL 00/66] MIPS patches for 2021-01-07, Philippe Mathieu-Daudé, 2021/01/07
- Re: [PULL 00/66] MIPS patches for 2021-01-07, no-reply, 2021/01/07
- Re: [PULL 00/66] MIPS patches for 2021-01-07, Peter Maydell, 2021/01/08