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Re: [1/1] tcg/mips: Fix SoftTLB comparison on mips backend
From: |
Alex Bennée |
Subject: |
Re: [1/1] tcg/mips: Fix SoftTLB comparison on mips backend |
Date: |
Thu, 01 Apr 2021 12:40:50 +0100 |
User-agent: |
mu4e 1.5.11; emacs 28.0.50 |
Kele Huang <kele.hwang@gmail.com> writes:
> The addrl used to compare with SoftTLB entry should be sign-extended
> in common case, and it will cause constant failing in SoftTLB
> comparisons for the addrl whose address is over 0x80000000 on the
> emulation of 32-bit guest on 64-bit host.
>
> This is an important performance bug fix. Spec2000 gzip rate increase
> from ~45 to ~140 on Loongson 3A4000 (MIPS compatible platform).
>
> Signed-off-by: Kele Huang <kele.hwang@gmail.com>
> ---
> tcg/mips/tcg-target.c.inc | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc
> index 8738a3a581..8b16726242 100644
> --- a/tcg/mips/tcg-target.c.inc
> +++ b/tcg/mips/tcg-target.c.inc
> @@ -1201,13 +1201,13 @@ static void tcg_out_tlb_load(TCGContext *s, TCGReg
> base, TCGReg addrl,
> load the tlb addend for the fast path. */
> tcg_out_ld(s, TCG_TYPE_PTR, TCG_TMP2, TCG_TMP3, add_off);
> }
> - tcg_out_opc_reg(s, OPC_AND, TCG_TMP1, TCG_TMP1, addrl);
>
> /* Zero extend a 32-bit guest address for a 64-bit host. */
> if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
> tcg_out_ext32u(s, base, addrl);
> addrl = base;
> }
> + tcg_out_opc_reg(s, OPC_AND, TCG_TMP1, TCG_TMP1, addrl);
>
> label_ptr[0] = s->code_ptr;
> tcg_out_opc_br(s, OPC_BNE, TCG_TMP1, TCG_TMP0);
Looks reasonable to me:
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée