[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v1 3/8] target/riscv: Add the ePMP feature
|
From: |
Alistair Francis |
|
Subject: |
[PATCH v1 3/8] target/riscv: Add the ePMP feature |
|
Date: |
Fri, 2 Apr 2021 08:47:44 -0400 |
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/cpu.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 0a33d387ba..8dcb4a4bb2 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -80,6 +80,7 @@
enum {
RISCV_FEATURE_MMU,
RISCV_FEATURE_PMP,
+ RISCV_FEATURE_EPMP,
RISCV_FEATURE_MISA
};
--
2.31.0
- [PATCH v1 0/8] RISC-V: Add support for ePMP v0.9.1, Alistair Francis, 2021/04/02
- [PATCH v1 2/8] target/riscv: Define ePMP mseccfg, Alistair Francis, 2021/04/02
- [PATCH v1 3/8] target/riscv: Add the ePMP feature,
Alistair Francis <=
- [PATCH v1 1/8] target/riscv: Fix the PMP is locked check when using TOR, Alistair Francis, 2021/04/02
- [PATCH v1 4/8] target/riscv: Add ePMP CSR access functions, Alistair Francis, 2021/04/02
- [PATCH v1 5/8] target/riscv: Implementation of enhanced PMP (ePMP), Alistair Francis, 2021/04/02
- [PATCH v1 6/8] target/riscv: Add a config option for ePMP, Alistair Francis, 2021/04/02