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[PULL 43/51] hw/arm/stellaris: Wire sysclk up to armv7m
From: |
Peter Maydell |
Subject: |
[PULL 43/51] hw/arm/stellaris: Wire sysclk up to armv7m |
Date: |
Wed, 1 Sep 2021 11:36:45 +0100 |
Connect the sysclk to the armv7m object. This board's SoC does not
connect up the systick reference clock, so we don't need to connect a
refclk.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alexandre Iooss <erdnaxe@crans.org>
Message-id: 20210812093356.1946-18-peter.maydell@linaro.org
---
hw/arm/stellaris.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
index bf24abd44fd..8c8bd39e2fe 100644
--- a/hw/arm/stellaris.c
+++ b/hw/arm/stellaris.c
@@ -1322,7 +1322,7 @@ static void stellaris_init(MachineState *ms,
stellaris_board_info *board)
DeviceState *ssys_dev;
int i;
int j;
- uint8_t *macaddr;
+ const uint8_t *macaddr;
MemoryRegion *sram = g_new(MemoryRegion, 1);
MemoryRegion *flash = g_new(MemoryRegion, 1);
@@ -1364,6 +1364,9 @@ static void stellaris_init(MachineState *ms,
stellaris_board_info *board)
qdev_prop_set_uint32(nvic, "num-irq", NUM_IRQ_LINES);
qdev_prop_set_string(nvic, "cpu-type", ms->cpu_type);
qdev_prop_set_bit(nvic, "enable-bitband", true);
+ qdev_connect_clock_in(nvic, "cpuclk",
+ qdev_get_clock_out(ssys_dev, "SYSCLK"));
+ /* This SoC does not connect the systick reference clock */
object_property_set_link(OBJECT(nvic), "memory",
OBJECT(get_system_memory()), &error_abort);
/* This will exit with an error if the user passed us a bad cpu_type */
--
2.20.1
- [PULL 06/51] target/arm: Implement MVE VADD (floating-point), (continued)
- [PULL 06/51] target/arm: Implement MVE VADD (floating-point), Peter Maydell, 2021/09/01
- [PULL 20/51] target/arm: Implement MVE VCVT with specified rounding mode, Peter Maydell, 2021/09/01
- [PULL 24/51] target-arm: Add support for Fujitsu A64FX, Peter Maydell, 2021/09/01
- [PULL 16/51] target/arm: Implement MVE fp vector comparisons, Peter Maydell, 2021/09/01
- [PULL 19/51] target/arm: Implement MVE VCVT between fp and integer, Peter Maydell, 2021/09/01
- [PULL 33/51] armsse: Wire up systick cpuclk clock, Peter Maydell, 2021/09/01
- [PULL 30/51] hw/timer/armv7m_systick: Add usual QEMU interface comment, Peter Maydell, 2021/09/01
- [PULL 36/51] hw/arm: Don't allocate separate MemoryRegions in stm32 SoC realize, Peter Maydell, 2021/09/01
- [PULL 39/51] hw/arm/stm32f405: Wire up sysclk and refclk, Peter Maydell, 2021/09/01
- [PULL 37/51] hw/arm/stm32f100: Wire up sysclk and refclk, Peter Maydell, 2021/09/01
- [PULL 43/51] hw/arm/stellaris: Wire sysclk up to armv7m,
Peter Maydell <=
- [PULL 35/51] clock: Provide builtin multiplier/divider, Peter Maydell, 2021/09/01
- [PULL 34/51] hw/arm/mps2.c: Connect up armv7m clocks, Peter Maydell, 2021/09/01
- [PULL 45/51] hw/arm/msf2: Use Clock input to MSF2_SOC instead of m3clk property, Peter Maydell, 2021/09/01
- [PULL 41/51] hw/arm/nrf51: Wire up sysclk, Peter Maydell, 2021/09/01
- [PULL 48/51] hw/arm/stellaris: Fix code style issues in GPTM code, Peter Maydell, 2021/09/01
- [PULL 46/51] hw/arm/msf2-soc: Wire up refclk, Peter Maydell, 2021/09/01
- [PULL 23/51] target/arm: Enable MVE in Cortex-M55, Peter Maydell, 2021/09/01
- [PULL 25/51] hw/arm/virt: target-arm: Add A64FX processor support to virt machine, Peter Maydell, 2021/09/01
- [PULL 28/51] arm: Move systick device creation from NVIC to ARMv7M object, Peter Maydell, 2021/09/01
- [PULL 29/51] arm: Move system PPB container handling to armv7m, Peter Maydell, 2021/09/01