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Re: [PATCH v4 2/4] hw/intc: Upgrade the SiFive CLINT implementation to R


From: Bin Meng
Subject: Re: [PATCH v4 2/4] hw/intc: Upgrade the SiFive CLINT implementation to RISC-V ACLINT
Date: Wed, 8 Sep 2021 14:14:52 +0800

On Tue, Aug 31, 2021 at 7:07 PM Anup Patel <anup.patel@wdc.com> wrote:
>
> The RISC-V ACLINT is more modular and backward compatible with
> original SiFive CLINT so instead of duplicating the original
> SiFive CLINT implementation we upgrade the current SiFive CLINT
> implementation to RISC-V ACLINT implementation.
>
> Signed-off-by: Anup Patel <anup.patel@wdc.com>
> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
> ---
>  hw/intc/riscv_aclint.c         | 373 +++++++++++++++++++++++----------
>  hw/riscv/microchip_pfsoc.c     |   9 +-
>  hw/riscv/shakti_c.c            |  11 +-
>  hw/riscv/sifive_e.c            |  11 +-
>  hw/riscv/sifive_u.c            |   9 +-
>  hw/riscv/spike.c               |  14 +-
>  hw/riscv/virt.c                |  14 +-
>  include/hw/intc/riscv_aclint.h |  54 +++--
>  8 files changed, 339 insertions(+), 156 deletions(-)
>

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>



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