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Re: [PATCH v11 7/7] [RISCV_PM] Allow experimental J-ext to be turned on


From: Bin Meng
Subject: Re: [PATCH v11 7/7] [RISCV_PM] Allow experimental J-ext to be turned on
Date: Fri, 10 Sep 2021 15:14:02 +0800

On Fri, Sep 10, 2021 at 3:13 AM Alexey Baturo <baturo.alexey@gmail.com> wrote:
>
> Signed-off-by: Alexey Baturo <space.monkey.delivers@gmail.com>
> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
> ---
>  target/riscv/cpu.c | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index f5fdc31fb9..4a1dd41818 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -582,6 +582,9 @@ static void riscv_cpu_realize(DeviceState *dev, Error 
> **errp)
>              }
>              set_vext_version(env, vext_version);
>          }
> +        if (cpu->cfg.ext_j) {
> +            target_misa |= RVJ;
> +        }
>
>          set_misa(env, target_misa);
>      }
> @@ -616,6 +619,7 @@ static Property riscv_cpu_properties[] = {
>      DEFINE_PROP_BOOL("x-b", RISCVCPU, cfg.ext_b, false),
>      DEFINE_PROP_BOOL("x-h", RISCVCPU, cfg.ext_h, false),
>      DEFINE_PROP_BOOL("x-v", RISCVCPU, cfg.ext_v, false),
> +    DEFINE_PROP_BOOL("x-j", RISCVCPU, cfg.ext_j, false),

nits: please put "x-j" before "x-v", by following the alphabetical order

>      DEFINE_PROP_BOOL("Counters", RISCVCPU, cfg.ext_counters, true),
>      DEFINE_PROP_BOOL("Zifencei", RISCVCPU, cfg.ext_ifencei, true),
>      DEFINE_PROP_BOOL("Zicsr", RISCVCPU, cfg.ext_icsr, true),
> --

Otherwise,
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>



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