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[PULL 05/21] target/i386: Added VGIF V_IRQ masking capability
From: |
Paolo Bonzini |
Subject: |
[PULL 05/21] target/i386: Added VGIF V_IRQ masking capability |
Date: |
Mon, 13 Sep 2021 13:57:26 +0200 |
From: Lara Lazier <laramglazier@gmail.com>
VGIF provides masking capability for when virtual interrupts
are taken. (APM2)
Signed-off-by: Lara Lazier <laramglazier@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/cpu.c | 7 +++++--
target/i386/cpu.h | 2 ++
target/i386/tcg/sysemu/svm_helper.c | 12 ++++++++++++
3 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index ddc3b63cb8..6b029f1bdf 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -5657,6 +5657,7 @@ static void x86_cpu_reset(DeviceState *dev)
/* init to reset state */
env->int_ctl = 0;
env->hflags2 |= HF2_GIF_MASK;
+ env->hflags2 |= HF2_VGIF_MASK;
env->hflags &= ~HF_GUEST_MASK;
cpu_x86_update_cr0(env, 0x60000010);
@@ -6540,10 +6541,12 @@ int x86_cpu_pending_interrupt(CPUState *cs, int
interrupt_request)
!(env->hflags & HF_INHIBIT_IRQ_MASK))))) {
return CPU_INTERRUPT_HARD;
#if !defined(CONFIG_USER_ONLY)
- } else if ((interrupt_request & CPU_INTERRUPT_VIRQ) &&
+ } else if (env->hflags2 & HF2_VGIF_MASK) {
+ if((interrupt_request & CPU_INTERRUPT_VIRQ) &&
(env->eflags & IF_MASK) &&
!(env->hflags & HF_INHIBIT_IRQ_MASK)) {
- return CPU_INTERRUPT_VIRQ;
+ return CPU_INTERRUPT_VIRQ;
+ }
#endif
}
}
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 3dfe630d7e..24e8ec5273 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -203,6 +203,7 @@ typedef enum X86Seg {
#define HF2_MPX_PR_SHIFT 5 /* BNDCFGx.BNDPRESERVE */
#define HF2_NPT_SHIFT 6 /* Nested Paging enabled */
#define HF2_IGNNE_SHIFT 7 /* Ignore CR0.NE=0 */
+#define HF2_VGIF_SHIFT 8 /* Can take VIRQ*/
#define HF2_GIF_MASK (1 << HF2_GIF_SHIFT)
#define HF2_HIF_MASK (1 << HF2_HIF_SHIFT)
@@ -212,6 +213,7 @@ typedef enum X86Seg {
#define HF2_MPX_PR_MASK (1 << HF2_MPX_PR_SHIFT)
#define HF2_NPT_MASK (1 << HF2_NPT_SHIFT)
#define HF2_IGNNE_MASK (1 << HF2_IGNNE_SHIFT)
+#define HF2_VGIF_MASK (1 << HF2_VGIF_SHIFT)
#define CR0_PE_SHIFT 0
#define CR0_MP_SHIFT 1
diff --git a/target/i386/tcg/sysemu/svm_helper.c
b/target/i386/tcg/sysemu/svm_helper.c
index 24c58b6a38..4612dae1ac 100644
--- a/target/i386/tcg/sysemu/svm_helper.c
+++ b/target/i386/tcg/sysemu/svm_helper.c
@@ -130,6 +130,11 @@ static inline bool virtual_gif_enabled(CPUX86State *env)
return false;
}
+static inline bool virtual_gif_set(CPUX86State *env)
+{
+ return !virtual_gif_enabled(env) || (env->int_ctl & V_GIF_MASK);
+}
+
void helper_vmrun(CPUX86State *env, int aflag, int next_eip_addend)
{
CPUState *cs = env_cpu(env);
@@ -364,6 +369,10 @@ void helper_vmrun(CPUX86State *env, int aflag, int
next_eip_addend)
cs->interrupt_request |= CPU_INTERRUPT_VIRQ;
}
+ if (virtual_gif_set(env)) {
+ env->hflags2 |= HF2_VGIF_MASK;
+ }
+
/* maybe we need to inject an event */
event_inj = x86_ldl_phys(cs, env->vm_vmcb + offsetof(struct vmcb,
control.event_inj));
@@ -520,6 +529,7 @@ void helper_stgi(CPUX86State *env)
if (virtual_gif_enabled(env)) {
env->int_ctl |= V_GIF_MASK;
+ env->hflags2 |= HF2_VGIF_MASK;
} else {
env->hflags2 |= HF2_GIF_MASK;
}
@@ -531,6 +541,7 @@ void helper_clgi(CPUX86State *env)
if (virtual_gif_enabled(env)) {
env->int_ctl &= ~V_GIF_MASK;
+ env->hflags2 &= ~HF2_VGIF_MASK;
} else {
env->hflags2 &= ~HF2_GIF_MASK;
}
@@ -812,6 +823,7 @@ void do_vmexit(CPUX86State *env)
env->vm_vmcb + offsetof(struct vmcb, control.event_inj), 0);
env->hflags2 &= ~HF2_GIF_MASK;
+ env->hflags2 &= ~HF2_VGIF_MASK;
/* FIXME: Resets the current ASID register to zero (host ASID). */
/* Clears the V_IRQ and V_INTR_MASKING bits inside the processor. */
--
2.31.1
- [PULL 10/21] docs: standardize directory index to --- with overline, (continued)
- [PULL 10/21] docs: standardize directory index to --- with overline, Paolo Bonzini, 2021/09/13
- [PULL 11/21] docs/system: standardize man page sections to --- with overline, Paolo Bonzini, 2021/09/13
- [PULL 06/21] target/i386: Added ignore TPR check in ctl_has_irq, Paolo Bonzini, 2021/09/13
- [PULL 09/21] docs: standardize book titles to === with overline, Paolo Bonzini, 2021/09/13
- [PULL 12/21] docs/system: move x86 CPU configuration to a separate document, Paolo Bonzini, 2021/09/13
- [PULL 19/21] Only check CONFIG_NVMM when NEED_CPU_H is defined, Paolo Bonzini, 2021/09/13
- [PULL 04/21] target/i386: Moved int_ctl into CPUX86State structure, Paolo Bonzini, 2021/09/13
- [PULL 14/21] meson: look up cp and dtrace with find_program(), Paolo Bonzini, 2021/09/13
- [PULL 16/21] meson: remove dead variable, Paolo Bonzini, 2021/09/13
- [PULL 07/21] target/i386: Added changed priority check for VIRQ, Paolo Bonzini, 2021/09/13
- [PULL 05/21] target/i386: Added VGIF V_IRQ masking capability,
Paolo Bonzini <=
- [PULL 13/21] meson.build: Do not look for VNC-related libraries if have_system is not set, Paolo Bonzini, 2021/09/13
- [PULL 17/21] fw_cfg: add etc/msr_feature_control, Paolo Bonzini, 2021/09/13
- [PULL 15/21] meson: do not use python.full_path() unnecessarily, Paolo Bonzini, 2021/09/13
- [PULL 20/21] Fix nvmm_ram_block_added() function arguments, Paolo Bonzini, 2021/09/13
- [PULL 18/21] util: Suppress -Wstringop-overflow in qemu_thread_start, Paolo Bonzini, 2021/09/13
- [PULL 21/21] docs: link to archived Fedora code of conduct, Paolo Bonzini, 2021/09/13
- Re: [PULL 00/21] x86, docs, meson changes for 2021-09-13, Peter Maydell, 2021/09/13