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[PULL 28/35] target/sparc: Restrict has_work() handler to sysemu
From: |
Richard Henderson |
Subject: |
[PULL 28/35] target/sparc: Restrict has_work() handler to sysemu |
Date: |
Thu, 16 Sep 2021 08:30:18 -0700 |
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
Restrict has_work() to sysemu.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210912172731.789788-28-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/sparc/cpu.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index e83e305aa9..4a63ed1264 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -702,6 +702,7 @@ static void sparc_cpu_synchronize_from_tb(CPUState *cs,
cpu->env.npc = tb->cs_base;
}
+#if !defined(CONFIG_USER_ONLY)
static bool sparc_cpu_has_work(CPUState *cs)
{
SPARCCPU *cpu = SPARC_CPU(cs);
@@ -710,6 +711,7 @@ static bool sparc_cpu_has_work(CPUState *cs)
return (cs->interrupt_request & CPU_INTERRUPT_HARD) &&
cpu_interrupts_enabled(env);
}
+#endif /* !CONFIG_USER_ONLY */
static char *sparc_cpu_type_name(const char *cpu_model)
{
@@ -867,6 +869,7 @@ static const struct TCGCPUOps sparc_tcg_ops = {
.tlb_fill = sparc_cpu_tlb_fill,
#ifndef CONFIG_USER_ONLY
+ .has_work = sparc_cpu_has_work,
.cpu_exec_interrupt = sparc_cpu_exec_interrupt,
.do_interrupt = sparc_cpu_do_interrupt,
.do_transaction_failed = sparc_cpu_do_transaction_failed,
@@ -888,7 +891,6 @@ static void sparc_cpu_class_init(ObjectClass *oc, void
*data)
cc->class_by_name = sparc_cpu_class_by_name;
cc->parse_features = sparc_cpu_parse_features;
- cc->has_work = sparc_cpu_has_work;
cc->dump_state = sparc_cpu_dump_state;
#if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY)
cc->memory_rw_debug = sparc_cpu_memory_rw_debug;
--
2.25.1
- [PULL 19/35] target/nios2: Restrict has_work() handler to sysemu, (continued)
- [PULL 19/35] target/nios2: Restrict has_work() handler to sysemu, Richard Henderson, 2021/09/16
- [PULL 22/35] target/ppc: Restrict has_work() handlers to sysemu and TCG, Richard Henderson, 2021/09/16
- [PULL 29/35] target/tricore: Restrict has_work() handler to sysemu, Richard Henderson, 2021/09/16
- [PULL 16/35] target/m68k: Restrict has_work() handler to sysemu, Richard Henderson, 2021/09/16
- [PULL 23/35] target/riscv: Restrict has_work() handler to sysemu and TCG, Richard Henderson, 2021/09/16
- [PULL 15/35] target/i386: Restrict has_work() handler to sysemu and TCG, Richard Henderson, 2021/09/16
- [PULL 30/35] target/xtensa: Restrict has_work() handler to sysemu, Richard Henderson, 2021/09/16
- [PULL 17/35] target/microblaze: Restrict has_work() handler to sysemu, Richard Henderson, 2021/09/16
- [PULL 21/35] target/ppc: Introduce PowerPCCPUClass::has_work(), Richard Henderson, 2021/09/16
- [PULL 24/35] target/rx: Restrict has_work() handler to sysemu, Richard Henderson, 2021/09/16
- [PULL 28/35] target/sparc: Restrict has_work() handler to sysemu,
Richard Henderson <=
- [PULL 27/35] target/sparc: Remove pointless use of CONFIG_TCG definition, Richard Henderson, 2021/09/16
- [PULL 33/35] tcg/mips: Allow JAL to be out of range in tcg_out_bswap_subr, Richard Henderson, 2021/09/16
- [PULL 35/35] tcg/mips: Drop special alignment for code_gen_buffer, Richard Henderson, 2021/09/16
- [PULL 31/35] accel: Add missing AccelOpsClass::has_work() and drop SysemuCPUOps one, Richard Henderson, 2021/09/16
- [PULL 18/35] target/mips: Restrict has_work() handler to sysemu and TCG, Richard Henderson, 2021/09/16
- [PULL 25/35] target/s390x: Restrict has_work() handler to sysemu and TCG, Richard Henderson, 2021/09/16
- [PULL 32/35] tcg/mips: Drop inline markers, Richard Henderson, 2021/09/16
- [PULL 20/35] target/openrisc: Restrict has_work() handler to sysemu, Richard Henderson, 2021/09/16
- [PULL 26/35] target/sh4: Restrict has_work() handler to sysemu, Richard Henderson, 2021/09/16
- [PULL 34/35] tcg/mips: Unset TCG_TARGET_HAS_direct_jump, Richard Henderson, 2021/09/16