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[PULL 31/35] accel: Add missing AccelOpsClass::has_work() and drop Sysem
From: |
Richard Henderson |
Subject: |
[PULL 31/35] accel: Add missing AccelOpsClass::has_work() and drop SysemuCPUOps one |
Date: |
Thu, 16 Sep 2021 08:30:21 -0700 |
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
cpu_common_has_work() is the default has_work() implementation
and returns 'false'.
Explicit it for the QTest / HAX / HVF / NVMM / Xen accelerators
and remove cpu_common_has_work().
Since there are no more implementations of SysemuCPUOps::has_work,
remove it along with the assertion in cpu_has_work().
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Paul Durrant <paul@xen.org>
Message-Id: <20210912172731.789788-31-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/hw/core/cpu.h | 2 --
accel/hvf/hvf-accel-ops.c | 6 ++++++
accel/qtest/qtest.c | 6 ++++++
accel/xen/xen-all.c | 6 ++++++
hw/core/cpu-common.c | 6 ------
softmmu/cpus.c | 9 ++-------
target/i386/hax/hax-accel-ops.c | 6 ++++++
target/i386/nvmm/nvmm-accel-ops.c | 6 ++++++
8 files changed, 32 insertions(+), 15 deletions(-)
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index e2dd171a13..c64709b898 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -89,7 +89,6 @@ struct SysemuCPUOps;
* instantiatable CPU type.
* @parse_features: Callback to parse command line arguments.
* @reset_dump_flags: #CPUDumpFlags to use for reset logging.
- * @has_work: Callback for checking if there is work to do.
* @memory_rw_debug: Callback for GDB memory access.
* @dump_state: Callback for dumping state.
* @get_arch_id: Callback for getting architecture-dependent CPU ID.
@@ -132,7 +131,6 @@ struct CPUClass {
void (*parse_features)(const char *typename, char *str, Error **errp);
int reset_dump_flags;
- bool (*has_work)(CPUState *cpu);
int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
uint8_t *buf, int len, bool is_write);
void (*dump_state)(CPUState *cpu, FILE *, int flags);
diff --git a/accel/hvf/hvf-accel-ops.c b/accel/hvf/hvf-accel-ops.c
index d1691be989..53c427ee42 100644
--- a/accel/hvf/hvf-accel-ops.c
+++ b/accel/hvf/hvf-accel-ops.c
@@ -446,6 +446,11 @@ static void hvf_start_vcpu_thread(CPUState *cpu)
cpu, QEMU_THREAD_JOINABLE);
}
+static bool hvf_cpu_has_work(CPUState *cpu)
+{
+ return false;
+}
+
static void hvf_accel_ops_class_init(ObjectClass *oc, void *data)
{
AccelOpsClass *ops = ACCEL_OPS_CLASS(oc);
@@ -456,6 +461,7 @@ static void hvf_accel_ops_class_init(ObjectClass *oc, void
*data)
ops->synchronize_post_init = hvf_cpu_synchronize_post_init;
ops->synchronize_state = hvf_cpu_synchronize_state;
ops->synchronize_pre_loadvm = hvf_cpu_synchronize_pre_loadvm;
+ ops->has_work = hvf_cpu_has_work;
};
static const TypeInfo hvf_accel_ops_type = {
.name = ACCEL_OPS_NAME("hvf"),
diff --git a/accel/qtest/qtest.c b/accel/qtest/qtest.c
index 7e6b8110d5..eb5a17cef1 100644
--- a/accel/qtest/qtest.c
+++ b/accel/qtest/qtest.c
@@ -47,12 +47,18 @@ static const TypeInfo qtest_accel_type = {
};
module_obj(TYPE_QTEST_ACCEL);
+static bool qtest_cpu_has_work(CPUState *cpu)
+{
+ return false;
+}
+
static void qtest_accel_ops_class_init(ObjectClass *oc, void *data)
{
AccelOpsClass *ops = ACCEL_OPS_CLASS(oc);
ops->create_vcpu_thread = dummy_start_vcpu_thread;
ops->get_virtual_clock = qtest_get_virtual_clock;
+ ops->has_work = qtest_cpu_has_work;
};
static const TypeInfo qtest_accel_ops_type = {
diff --git a/accel/xen/xen-all.c b/accel/xen/xen-all.c
index 69aa7d018b..fe5a37fa2e 100644
--- a/accel/xen/xen-all.c
+++ b/accel/xen/xen-all.c
@@ -215,11 +215,17 @@ static const TypeInfo xen_accel_type = {
.class_init = xen_accel_class_init,
};
+static bool xen_cpu_has_work(CPUState *cpu)
+{
+ return false;
+}
+
static void xen_accel_ops_class_init(ObjectClass *oc, void *data)
{
AccelOpsClass *ops = ACCEL_OPS_CLASS(oc);
ops->create_vcpu_thread = dummy_start_vcpu_thread;
+ ops->has_work = xen_cpu_has_work;
}
static const TypeInfo xen_accel_ops_type = {
diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c
index e2f5a64604..5ed1ccdfdd 100644
--- a/hw/core/cpu-common.c
+++ b/hw/core/cpu-common.c
@@ -143,11 +143,6 @@ static void cpu_common_reset(DeviceState *dev)
}
}
-static bool cpu_common_has_work(CPUState *cs)
-{
- return false;
-}
-
ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
{
CPUClass *cc = CPU_CLASS(object_class_by_name(typename));
@@ -279,7 +274,6 @@ static void cpu_class_init(ObjectClass *klass, void *data)
k->parse_features = cpu_common_parse_features;
k->get_arch_id = cpu_common_get_arch_id;
- k->has_work = cpu_common_has_work;
k->gdb_read_register = cpu_common_gdb_read_register;
k->gdb_write_register = cpu_common_gdb_write_register;
set_bit(DEVICE_CATEGORY_CPU, dc->categories);
diff --git a/softmmu/cpus.c b/softmmu/cpus.c
index 6bce52ce56..e6dad2243c 100644
--- a/softmmu/cpus.c
+++ b/softmmu/cpus.c
@@ -251,13 +251,8 @@ void cpu_interrupt(CPUState *cpu, int mask)
bool cpu_has_work(CPUState *cpu)
{
- CPUClass *cc = CPU_GET_CLASS(cpu);
-
- if (cpus_accel->has_work) {
- return cpus_accel->has_work(cpu);
- }
- g_assert(cc->has_work);
- return cc->has_work(cpu);
+ g_assert(cpus_accel->has_work);
+ return cpus_accel->has_work(cpu);
}
static int do_vm_stop(RunState state, bool send_stop)
diff --git a/target/i386/hax/hax-accel-ops.c b/target/i386/hax/hax-accel-ops.c
index 136630e9b2..5407ba17ea 100644
--- a/target/i386/hax/hax-accel-ops.c
+++ b/target/i386/hax/hax-accel-ops.c
@@ -74,6 +74,11 @@ static void hax_start_vcpu_thread(CPUState *cpu)
#endif
}
+static bool hax_cpu_has_work(CPUState *cpu)
+{
+ return false;
+}
+
static void hax_accel_ops_class_init(ObjectClass *oc, void *data)
{
AccelOpsClass *ops = ACCEL_OPS_CLASS(oc);
@@ -85,6 +90,7 @@ static void hax_accel_ops_class_init(ObjectClass *oc, void
*data)
ops->synchronize_post_init = hax_cpu_synchronize_post_init;
ops->synchronize_state = hax_cpu_synchronize_state;
ops->synchronize_pre_loadvm = hax_cpu_synchronize_pre_loadvm;
+ ops->has_work = hax_cpu_has_work;
}
static const TypeInfo hax_accel_ops_type = {
diff --git a/target/i386/nvmm/nvmm-accel-ops.c
b/target/i386/nvmm/nvmm-accel-ops.c
index f788f75289..36296f79ff 100644
--- a/target/i386/nvmm/nvmm-accel-ops.c
+++ b/target/i386/nvmm/nvmm-accel-ops.c
@@ -83,6 +83,11 @@ static void nvmm_kick_vcpu_thread(CPUState *cpu)
cpus_kick_thread(cpu);
}
+static bool nvmm_cpu_has_work(CPUState *cpu)
+{
+ return false;
+}
+
static void nvmm_accel_ops_class_init(ObjectClass *oc, void *data)
{
AccelOpsClass *ops = ACCEL_OPS_CLASS(oc);
@@ -94,6 +99,7 @@ static void nvmm_accel_ops_class_init(ObjectClass *oc, void
*data)
ops->synchronize_post_init = nvmm_cpu_synchronize_post_init;
ops->synchronize_state = nvmm_cpu_synchronize_state;
ops->synchronize_pre_loadvm = nvmm_cpu_synchronize_pre_loadvm;
+ ops->has_work = nvmm_cpu_has_work;
}
static const TypeInfo nvmm_accel_ops_type = {
--
2.25.1
- [PULL 23/35] target/riscv: Restrict has_work() handler to sysemu and TCG, (continued)
- [PULL 23/35] target/riscv: Restrict has_work() handler to sysemu and TCG, Richard Henderson, 2021/09/16
- [PULL 15/35] target/i386: Restrict has_work() handler to sysemu and TCG, Richard Henderson, 2021/09/16
- [PULL 30/35] target/xtensa: Restrict has_work() handler to sysemu, Richard Henderson, 2021/09/16
- [PULL 17/35] target/microblaze: Restrict has_work() handler to sysemu, Richard Henderson, 2021/09/16
- [PULL 21/35] target/ppc: Introduce PowerPCCPUClass::has_work(), Richard Henderson, 2021/09/16
- [PULL 24/35] target/rx: Restrict has_work() handler to sysemu, Richard Henderson, 2021/09/16
- [PULL 28/35] target/sparc: Restrict has_work() handler to sysemu, Richard Henderson, 2021/09/16
- [PULL 27/35] target/sparc: Remove pointless use of CONFIG_TCG definition, Richard Henderson, 2021/09/16
- [PULL 33/35] tcg/mips: Allow JAL to be out of range in tcg_out_bswap_subr, Richard Henderson, 2021/09/16
- [PULL 35/35] tcg/mips: Drop special alignment for code_gen_buffer, Richard Henderson, 2021/09/16
- [PULL 31/35] accel: Add missing AccelOpsClass::has_work() and drop SysemuCPUOps one,
Richard Henderson <=
- [PULL 18/35] target/mips: Restrict has_work() handler to sysemu and TCG, Richard Henderson, 2021/09/16
- [PULL 25/35] target/s390x: Restrict has_work() handler to sysemu and TCG, Richard Henderson, 2021/09/16
- [PULL 32/35] tcg/mips: Drop inline markers, Richard Henderson, 2021/09/16
- [PULL 20/35] target/openrisc: Restrict has_work() handler to sysemu, Richard Henderson, 2021/09/16
- [PULL 26/35] target/sh4: Restrict has_work() handler to sysemu, Richard Henderson, 2021/09/16
- [PULL 34/35] tcg/mips: Unset TCG_TARGET_HAS_direct_jump, Richard Henderson, 2021/09/16
- Re: [PULL 00/35] tcg patch queue, Peter Maydell, 2021/09/20