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[PATCH v2 41/41] accel/tcg: Restrict TCGCPUOps::tlb_fill() to sysemu
From: |
Richard Henderson |
Subject: |
[PATCH v2 41/41] accel/tcg: Restrict TCGCPUOps::tlb_fill() to sysemu |
Date: |
Sat, 18 Sep 2021 11:45:27 -0700 |
We have replaced tlb_fill with record_sigsegv for user mod.
Move the declaration to restrict it to system emulation.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/hw/core/tcg-cpu-ops.h | 22 ++++++++++------------
linux-user/signal.c | 3 ---
2 files changed, 10 insertions(+), 15 deletions(-)
diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h
index e229a40772..988561e8d4 100644
--- a/include/hw/core/tcg-cpu-ops.h
+++ b/include/hw/core/tcg-cpu-ops.h
@@ -35,18 +35,6 @@ struct TCGCPUOps {
void (*cpu_exec_enter)(CPUState *cpu);
/** @cpu_exec_exit: Callback for cpu_exec cleanup */
void (*cpu_exec_exit)(CPUState *cpu);
- /**
- * @tlb_fill: Handle a softmmu tlb miss or user-only address fault
- *
- * For system mode, if the access is valid, call tlb_set_page
- * and return true; if the access is invalid, and probe is
- * true, return false; otherwise raise an exception and do
- * not return. For user-only mode, always raise an exception
- * and do not return.
- */
- bool (*tlb_fill)(CPUState *cpu, vaddr address, int size,
- MMUAccessType access_type, int mmu_idx,
- bool probe, uintptr_t retaddr);
/** @debug_excp_handler: Callback for handling debug exceptions */
void (*debug_excp_handler)(CPUState *cpu);
@@ -72,6 +60,16 @@ struct TCGCPUOps {
bool (*has_work)(CPUState *cpu);
/** @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec */
bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request);
+ /**
+ * @tlb_fill: Handle a softmmu tlb miss
+ *
+ * If the access is valid, call tlb_set_page and return true;
+ * if the access is invalid and probe is true, return false;
+ * otherwise raise an exception and do not return.
+ */
+ bool (*tlb_fill)(CPUState *cpu, vaddr address, int size,
+ MMUAccessType access_type, int mmu_idx,
+ bool probe, uintptr_t retaddr);
/**
* @do_transaction_failed: Callback for handling failed memory transactions
* (ie bus faults or external aborts; not MMU faults)
diff --git a/linux-user/signal.c b/linux-user/signal.c
index ae31b46be0..4f4c919b23 100644
--- a/linux-user/signal.c
+++ b/linux-user/signal.c
@@ -690,9 +690,6 @@ void raise_sigsegv(CPUState *cpu, target_ulong addr,
if (tcg_ops->record_sigsegv) {
tcg_ops->record_sigsegv(cpu, addr, access_type, maperr, ra);
- } else if (tcg_ops->tlb_fill) {
- tcg_ops->tlb_fill(cpu, addr, 0, access_type, MMU_USER_IDX, false, ra);
- g_assert_not_reached();
}
force_sig_fault(TARGET_SIGSEGV,
--
2.25.1
- [PATCH v2 37/41] target/s390x: Implement s390_cpu_record_sigsegv, (continued)
- [PATCH v2 37/41] target/s390x: Implement s390_cpu_record_sigsegv, Richard Henderson, 2021/09/18
- [PATCH v2 38/41] target/sh4: Make sh4_cpu_tlb_fill sysemu only, Richard Henderson, 2021/09/18
- [PATCH v2 32/41] linux-user/openrisc: Adjust signal for EXCP_RANGE, EXCP_FPE, Richard Henderson, 2021/09/18
- [PATCH v2 31/41] target/nios2: Make nios2_cpu_tlb_fill sysemu only, Richard Henderson, 2021/09/18
- [PATCH v2 25/41] target/hexagon: Remove hexagon_cpu_tlb_fill, Richard Henderson, 2021/09/18
- [PATCH v2 34/41] target/ppc: Implement ppc_cpu_record_sigsegv, Richard Henderson, 2021/09/18
- [PATCH v2 33/41] target/openrisc: Make openrisc_cpu_tlb_fill sysemu only, Richard Henderson, 2021/09/18
- [PATCH v2 40/41] target/xtensa: Make xtensa_cpu_tlb_fill sysemu only, Richard Henderson, 2021/09/18
- [PATCH v2 41/41] accel/tcg: Restrict TCGCPUOps::tlb_fill() to sysemu,
Richard Henderson <=
- Re: [PATCH v2 00/41] linux-user: Streamline handling of SIGSEGV, Philippe Mathieu-Daudé, 2021/09/19