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Re: [PATCH v2 27/41] target/i386: Implement x86_cpu_record_sigsegv


From: Philippe Mathieu-Daudé
Subject: Re: [PATCH v2 27/41] target/i386: Implement x86_cpu_record_sigsegv
Date: Sun, 19 Sep 2021 20:32:11 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.1.0

On 9/18/21 20:45, Richard Henderson wrote:
> Record cr2, error_code, and exception_index.  That last means
> that we must exit to cpu_loop ourselves, instead of letting
> exception_index being overwritten.
> 
> Use the maperr parameter to properly set PG_ERROR_P_MASK.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>  target/i386/tcg/helper-tcg.h       |  6 ++++++
>  target/i386/tcg/tcg-cpu.c          |  3 ++-
>  target/i386/tcg/user/excp_helper.c | 23 +++++++++++++++++------
>  3 files changed, 25 insertions(+), 7 deletions(-)

> diff --git a/target/i386/tcg/user/excp_helper.c 
> b/target/i386/tcg/user/excp_helper.c
> index a89b5228fd..cd507e2a1b 100644
> --- a/target/i386/tcg/user/excp_helper.c
> +++ b/target/i386/tcg/user/excp_helper.c
> @@ -22,18 +22,29 @@
>  #include "exec/exec-all.h"
>  #include "tcg/helper-tcg.h"
>  
> -bool x86_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,
> -                      MMUAccessType access_type, int mmu_idx,
> -                      bool probe, uintptr_t retaddr)
> +void x86_cpu_record_sigsegv(CPUState *cs, vaddr addr,
> +                            MMUAccessType access_type,
> +                            bool maperr, uintptr_t ra)
>  {
>      X86CPU *cpu = X86_CPU(cs);
>      CPUX86State *env = &cpu->env;
>  
> +    /*
> +     * The error_code that hw reports as part of the exception frame
> +     * is copied to linux sigcontext.err.  The exception_index is
> +     * copied to linux sigcontext.trapno.  Short of inventing a new
> +     * place to store the trapno, we cannot let our caller raise the
> +     * signal and set exception_index to EXCP_INTERRUPT.
> +     */
>      env->cr[2] = addr;
> -    env->error_code = (access_type == MMU_DATA_STORE) << PG_ERROR_W_BIT;
> -    env->error_code |= PG_ERROR_U_MASK;
> +    env->error_code = ((access_type == MMU_DATA_STORE) << PG_ERROR_W_BIT)
> +                    | (maperr ? 0 : PG_ERROR_P_MASK)
> +                    | PG_ERROR_U_MASK;
>      cs->exception_index = EXCP0E_PAGE;
> +
> +    /* Disable do_interrupt_user. */
>      env->exception_is_int = 0;
>      env->exception_next_eip = -1;
> -    cpu_loop_exit_restore(cs, retaddr);
> +
> +    cpu_loop_exit_restore(cs, ra);
>  }
> 

Better have an x86 expert also review this, but to the best
of my knowledge:
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

And YAY! btw, thanks :>



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