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[PATCH v2 30/41] target/mips: Make mips_cpu_tlb_fill sysemu only
From: |
Richard Henderson |
Subject: |
[PATCH v2 30/41] target/mips: Make mips_cpu_tlb_fill sysemu only |
Date: |
Sat, 18 Sep 2021 11:45:16 -0700 |
The fallback code in raise_sigsegv is sufficient for mips linux-user.
This means we can remove tcg/user/tlb_helper.c entirely.
Remove the code from cpu_loop that raised SIGSEGV.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/mips/tcg/tcg-internal.h | 7 ++--
linux-user/mips/cpu_loop.c | 11 ------
target/mips/cpu.c | 2 +-
target/mips/tcg/user/tlb_helper.c | 59 -------------------------------
target/mips/tcg/meson.build | 3 --
target/mips/tcg/user/meson.build | 3 --
6 files changed, 5 insertions(+), 80 deletions(-)
delete mode 100644 target/mips/tcg/user/tlb_helper.c
delete mode 100644 target/mips/tcg/user/meson.build
diff --git a/target/mips/tcg/tcg-internal.h b/target/mips/tcg/tcg-internal.h
index c7a77ddccd..8ba36a8ef8 100644
--- a/target/mips/tcg/tcg-internal.h
+++ b/target/mips/tcg/tcg-internal.h
@@ -18,9 +18,6 @@
void mips_tcg_init(void);
void mips_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb);
-bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
- MMUAccessType access_type, int mmu_idx,
- bool probe, uintptr_t retaddr);
void mips_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
MMUAccessType access_type,
int mmu_idx, uintptr_t retaddr);
@@ -60,6 +57,10 @@ void mips_cpu_do_transaction_failed(CPUState *cs, hwaddr
physaddr,
MemTxResult response, uintptr_t retaddr);
void cpu_mips_tlb_flush(CPUMIPSState *env);
+bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
+ MMUAccessType access_type, int mmu_idx,
+ bool probe, uintptr_t retaddr);
+
#endif /* !CONFIG_USER_ONLY */
#endif
diff --git a/linux-user/mips/cpu_loop.c b/linux-user/mips/cpu_loop.c
index 9d813ece4e..40825ca566 100644
--- a/linux-user/mips/cpu_loop.c
+++ b/linux-user/mips/cpu_loop.c
@@ -156,17 +156,6 @@ done_syscall:
}
env->active_tc.gpr[2] = ret;
break;
- case EXCP_TLBL:
- case EXCP_TLBS:
- case EXCP_AdEL:
- case EXCP_AdES:
- info.si_signo = TARGET_SIGSEGV;
- info.si_errno = 0;
- /* XXX: check env->error_code */
- info.si_code = TARGET_SEGV_MAPERR;
- info._sifields._sigfault._addr = env->CP0_BadVAddr;
- queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
- break;
case EXCP_CpU:
case EXCP_RI:
info.si_signo = TARGET_SIGILL;
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index 3639c03f8e..439b2f1635 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -541,10 +541,10 @@ static const struct SysemuCPUOps mips_sysemu_ops = {
static const struct TCGCPUOps mips_tcg_ops = {
.initialize = mips_tcg_init,
.synchronize_from_tb = mips_cpu_synchronize_from_tb,
- .tlb_fill = mips_cpu_tlb_fill,
#if !defined(CONFIG_USER_ONLY)
.has_work = mips_cpu_has_work,
+ .tlb_fill = mips_cpu_tlb_fill,
.cpu_exec_interrupt = mips_cpu_exec_interrupt,
.do_interrupt = mips_cpu_do_interrupt,
.do_transaction_failed = mips_cpu_do_transaction_failed,
diff --git a/target/mips/tcg/user/tlb_helper.c
b/target/mips/tcg/user/tlb_helper.c
deleted file mode 100644
index 210c6d529e..0000000000
--- a/target/mips/tcg/user/tlb_helper.c
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * MIPS TLB (Translation lookaside buffer) helpers.
- *
- * Copyright (c) 2004-2005 Jocelyn Mayer
- *
- * This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public
- * License as published by the Free Software Foundation; either
- * version 2.1 of the License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public
- * License along with this library; if not, see <http://www.gnu.org/licenses/>.
- */
-#include "qemu/osdep.h"
-
-#include "cpu.h"
-#include "exec/exec-all.h"
-#include "internal.h"
-
-static void raise_mmu_exception(CPUMIPSState *env, target_ulong address,
- MMUAccessType access_type)
-{
- CPUState *cs = env_cpu(env);
-
- env->error_code = 0;
- if (access_type == MMU_INST_FETCH) {
- env->error_code |= EXCP_INST_NOTAVAIL;
- }
-
- /* Reference to kernel address from user mode or supervisor mode */
- /* Reference to supervisor address from user mode */
- if (access_type == MMU_DATA_STORE) {
- cs->exception_index = EXCP_AdES;
- } else {
- cs->exception_index = EXCP_AdEL;
- }
-
- /* Raise exception */
- if (!(env->hflags & MIPS_HFLAG_DM)) {
- env->CP0_BadVAddr = address;
- }
-}
-
-bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
- MMUAccessType access_type, int mmu_idx,
- bool probe, uintptr_t retaddr)
-{
- MIPSCPU *cpu = MIPS_CPU(cs);
- CPUMIPSState *env = &cpu->env;
-
- /* data access */
- raise_mmu_exception(env, address, access_type);
- do_raise_exception_err(env, cs->exception_index, env->error_code, retaddr);
-}
diff --git a/target/mips/tcg/meson.build b/target/mips/tcg/meson.build
index 8f6f7508b6..98003779ae 100644
--- a/target/mips/tcg/meson.build
+++ b/target/mips/tcg/meson.build
@@ -28,9 +28,6 @@ mips_ss.add(when: 'TARGET_MIPS64', if_true: files(
'mxu_translate.c',
))
-if have_user
- subdir('user')
-endif
if have_system
subdir('sysemu')
endif
diff --git a/target/mips/tcg/user/meson.build b/target/mips/tcg/user/meson.build
deleted file mode 100644
index 79badcd321..0000000000
--- a/target/mips/tcg/user/meson.build
+++ /dev/null
@@ -1,3 +0,0 @@
-mips_user_ss.add(files(
- 'tlb_helper.c',
-))
--
2.25.1
- [PATCH v2 22/41] target/arm: Use raise_sigsegv for mte tag lookup, (continued)
- [PATCH v2 22/41] target/arm: Use raise_sigsegv for mte tag lookup, Richard Henderson, 2021/09/18
- [PATCH v2 23/41] target/arm: Implement arm_cpu_record_sigsegv, Richard Henderson, 2021/09/18
- [PATCH v2 21/41] target/alpha: Make alpha_cpu_tlb_fill sysemu only, Richard Henderson, 2021/09/18
- [PATCH v2 26/41] target/hppa: Make hppa_cpu_tlb_fill sysemu only, Richard Henderson, 2021/09/18
- [PATCH v2 29/41] target/microblaze: Make mb_cpu_tlb_fill sysemu only, Richard Henderson, 2021/09/18
- [PATCH v2 35/41] target/riscv: Make riscv_cpu_tlb_fill sysemu only, Richard Henderson, 2021/09/18
- [PATCH v2 27/41] target/i386: Implement x86_cpu_record_sigsegv, Richard Henderson, 2021/09/18
- [PATCH v2 36/41] target/s390x: Use probe_access_flags in s390_probe_access, Richard Henderson, 2021/09/18
- [PATCH v2 39/41] target/sparc: Make sparc_cpu_tlb_fill sysemu only, Richard Henderson, 2021/09/18
- [PATCH v2 30/41] target/mips: Make mips_cpu_tlb_fill sysemu only,
Richard Henderson <=
- [PATCH v2 28/41] target/m68k: Make m68k_cpu_tlb_fill sysemu only, Richard Henderson, 2021/09/18
- [PATCH v2 37/41] target/s390x: Implement s390_cpu_record_sigsegv, Richard Henderson, 2021/09/18
- [PATCH v2 38/41] target/sh4: Make sh4_cpu_tlb_fill sysemu only, Richard Henderson, 2021/09/18
- [PATCH v2 32/41] linux-user/openrisc: Adjust signal for EXCP_RANGE, EXCP_FPE, Richard Henderson, 2021/09/18
- [PATCH v2 31/41] target/nios2: Make nios2_cpu_tlb_fill sysemu only, Richard Henderson, 2021/09/18
- [PATCH v2 25/41] target/hexagon: Remove hexagon_cpu_tlb_fill, Richard Henderson, 2021/09/18
- [PATCH v2 34/41] target/ppc: Implement ppc_cpu_record_sigsegv, Richard Henderson, 2021/09/18
- [PATCH v2 33/41] target/openrisc: Make openrisc_cpu_tlb_fill sysemu only, Richard Henderson, 2021/09/18