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Re: [PATCH v4 1/4] target/ppc: Convert debug to trace events (exceptions
From: |
David Gibson |
Subject: |
Re: [PATCH v4 1/4] target/ppc: Convert debug to trace events (exceptions) |
Date: |
Mon, 20 Sep 2021 16:54:38 +1000 |
On Mon, Sep 20, 2021 at 08:12:00AM +0200, Cédric Le Goater wrote:
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
Applied to ppc-for-6.2, thanks.
> ---
> target/ppc/excp_helper.c | 38 ++++++++++----------------------------
> target/ppc/trace-events | 8 ++++++++
> 2 files changed, 18 insertions(+), 28 deletions(-)
>
> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
> index d7e32ee107e0..b7d176792098 100644
> --- a/target/ppc/excp_helper.c
> +++ b/target/ppc/excp_helper.c
> @@ -23,20 +23,14 @@
> #include "internal.h"
> #include "helper_regs.h"
>
> +#include "trace.h"
> +
> #ifdef CONFIG_TCG
> #include "exec/helper-proto.h"
> #include "exec/cpu_ldst.h"
> #endif
>
> -/* #define DEBUG_OP */
> /* #define DEBUG_SOFTWARE_TLB */
> -/* #define DEBUG_EXCEPTIONS */
> -
> -#ifdef DEBUG_EXCEPTIONS
> -# define LOG_EXCP(...) qemu_log(__VA_ARGS__)
> -#else
> -# define LOG_EXCP(...) do { } while (0)
> -#endif
>
>
> /*****************************************************************************/
> /* Exception processing */
> @@ -414,12 +408,10 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int
> excp_model, int excp)
> }
> break;
> case POWERPC_EXCP_DSI: /* Data storage exception
> */
> - LOG_EXCP("DSI exception: DSISR=" TARGET_FMT_lx" DAR=" TARGET_FMT_lx
> - "\n", env->spr[SPR_DSISR], env->spr[SPR_DAR]);
> + trace_ppc_excp_dsi(env->spr[SPR_DSISR], env->spr[SPR_DAR]);
> break;
> case POWERPC_EXCP_ISI: /* Instruction storage exception
> */
> - LOG_EXCP("ISI exception: msr=" TARGET_FMT_lx ", nip=" TARGET_FMT_lx
> - "\n", msr, env->nip);
> + trace_ppc_excp_isi(msr, env->nip);
> msr |= env->error_code;
> break;
> case POWERPC_EXCP_EXTERNAL: /* External input
> */
> @@ -474,7 +466,7 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int
> excp_model, int excp)
> switch (env->error_code & ~0xF) {
> case POWERPC_EXCP_FP:
> if ((msr_fe0 == 0 && msr_fe1 == 0) || msr_fp == 0) {
> - LOG_EXCP("Ignore floating point exception\n");
> + trace_ppc_excp_fp_ignore();
> cs->exception_index = POWERPC_EXCP_NONE;
> env->error_code = 0;
> return;
> @@ -489,7 +481,7 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int
> excp_model, int excp)
> env->spr[SPR_BOOKE_ESR] = ESR_FP;
> break;
> case POWERPC_EXCP_INVAL:
> - LOG_EXCP("Invalid instruction at " TARGET_FMT_lx "\n", env->nip);
> + trace_ppc_excp_inval(env->nip);
> msr |= 0x00080000;
> env->spr[SPR_BOOKE_ESR] = ESR_PIL;
> break;
> @@ -547,10 +539,10 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int
> excp_model, int excp)
> break;
> case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt
> */
> /* FIT on 4xx */
> - LOG_EXCP("FIT exception\n");
> + trace_ppc_excp_print("FIT");
> break;
> case POWERPC_EXCP_WDT: /* Watchdog timer interrupt
> */
> - LOG_EXCP("WDT exception\n");
> + trace_ppc_excp_print("WDT");
> switch (excp_model) {
> case POWERPC_EXCP_BOOKE:
> srr0 = SPR_BOOKE_CSRR0;
> @@ -657,7 +649,7 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int
> excp_model, int excp)
> #endif
> break;
> case POWERPC_EXCP_PIT: /* Programmable interval timer interrupt
> */
> - LOG_EXCP("PIT exception\n");
> + trace_ppc_excp_print("PIT");
> break;
> case POWERPC_EXCP_IO: /* IO error exception
> */
> /* XXX: TODO */
> @@ -1115,14 +1107,6 @@ bool ppc_cpu_exec_interrupt(CPUState *cs, int
> interrupt_request)
>
> #endif /* !CONFIG_USER_ONLY */
>
> -#if defined(DEBUG_OP)
> -static void cpu_dump_rfi(target_ulong RA, target_ulong msr)
> -{
> - qemu_log("Return from exception at " TARGET_FMT_lx " with flags "
> - TARGET_FMT_lx "\n", RA, msr);
> -}
> -#endif
> -
>
> /*****************************************************************************/
> /* Exceptions processing helpers */
>
> @@ -1221,9 +1205,7 @@ static inline void do_rfi(CPUPPCState *env,
> target_ulong nip, target_ulong msr)
> /* XXX: beware: this is false if VLE is supported */
> env->nip = nip & ~((target_ulong)0x00000003);
> hreg_store_msr(env, msr, 1);
> -#if defined(DEBUG_OP)
> - cpu_dump_rfi(env->nip, env->msr);
> -#endif
> + trace_ppc_excp_rfi(env->nip, env->msr);
> /*
> * No need to raise an exception here, as rfi is always the last
> * insn of a TB
> diff --git a/target/ppc/trace-events b/target/ppc/trace-events
> index c88cfccf8d19..53b107f56eb6 100644
> --- a/target/ppc/trace-events
> +++ b/target/ppc/trace-events
> @@ -28,3 +28,11 @@ kvm_handle_epr(void) "handle epr"
> kvm_handle_watchdog_expiry(void) "handle watchdog expiry"
> kvm_handle_debug_exception(void) "handle debug exception"
> kvm_handle_nmi_exception(void) "handle NMI exception"
> +
> +# excp_helper.c
> +ppc_excp_rfi(uint64_t nip, uint64_t msr) "Return from exception at 0x%"
> PRIx64 " with flags 0x%016" PRIx64
> +ppc_excp_dsi(uint64_t dsisr, uint64_t dar) "DSI exception: DSISR=0x%" PRIx64
> " DAR=0x%" PRIx64
> +ppc_excp_isi(uint64_t msr, uint64_t nip) "ISI exception: msr=0x%016" PRIx64
> " nip=0x%" PRIx64
> +ppc_excp_fp_ignore(void) "Ignore floating point exception"
> +ppc_excp_inval(uint64_t nip) "Invalid instruction at 0x%" PRIx64
> +ppc_excp_print(const char *excp) "%s exception"
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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