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Re: [PATCH 28/30] configure, meson.build: Mark support for 64-bit LoongA


From: WANG Xuerui
Subject: Re: [PATCH 28/30] configure, meson.build: Mark support for 64-bit LoongArch hosts
Date: Tue, 21 Sep 2021 15:24:04 +0800
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:94.0) Gecko/20100101 Thunderbird/94.0a1

Hi Philippe,

On 9/21/21 14:59, Philippe Mathieu-Daudé wrote:
On 9/21/21 08:02, WANG Xuerui wrote:
On 9/21/21 01:23, Richard Henderson wrote:
On 9/20/21 1:04 AM, WANG Xuerui wrote:
Signed-off-by: WANG Xuerui <git@xen0n.name>
---
  configure   | 4 +++-
  meson.build | 4 +++-
  2 files changed, 6 insertions(+), 2 deletions(-)

If there's no loongarch32, and never will be, then there's probably no point in keeping the '64' suffix.

The loongarch32 tuple will most certainly come into existence some time in the future, but probably bare-metal-only and without a Linux port AFAIK. That's a point the Loongson people and I didn't communicate well, apologizes for that. (While we're at it, the reserved "loongarchx32" which is x32/n32-like, most likely will never exist.)

Are you trying to beat MIPS at their ABI complexity? /s

Hah, I'm not Loongson employee so maybe I'm not in the best position to answer this ;-)

But from an outsider's perspective, the Loongson people obviously reserved things upfront like a multi-millionaire, then suddenly realized they only have ~500 people on board, developers even less; so they did the Right Thing(TM), only later, to drop x32 altogether and focus their energy on bare-metal use cases for their 32-bit-only chips.

Plus, LoongArch is strictly little-endian, and only one baseline ISA revision is published so far, so IMO it can never beat MIPS in terms of combinatorial ABI possibilities. Maybe RISC-V have a chance? ;-)




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