[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 07/33] i386: Add primary SGX CPUID and MSR defines
From: |
Paolo Bonzini |
Subject: |
[PULL 07/33] i386: Add primary SGX CPUID and MSR defines |
Date: |
Tue, 28 Sep 2021 14:50:50 +0200 |
From: Sean Christopherson <sean.j.christopherson@intel.com>
Add CPUID defines for SGX and SGX Launch Control (LC), as well as
defines for their associated FEATURE_CONTROL MSR bits. Define the
Launch Enclave Public Key Hash MSRs (LE Hash MSRs), which exist
when SGX LC is present (in CPUID), and are writable when SGX LC is
enabled (in FEATURE_CONTROL).
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Yang Zhong <yang.zhong@intel.com>
Message-Id: <20210719112136.57018-7-yang.zhong@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/cpu.c | 4 ++--
target/i386/cpu.h | 12 ++++++++++++
2 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 6b029f1bdf..21d2a325ea 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -795,7 +795,7 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
[FEAT_7_0_EBX] = {
.type = CPUID_FEATURE_WORD,
.feat_names = {
- "fsgsbase", "tsc-adjust", NULL, "bmi1",
+ "fsgsbase", "tsc-adjust", "sgx", "bmi1",
"hle", "avx2", NULL, "smep",
"bmi2", "erms", "invpcid", "rtm",
NULL, NULL, "mpx", NULL,
@@ -821,7 +821,7 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
"la57", NULL, NULL, NULL,
NULL, NULL, "rdpid", NULL,
"bus-lock-detect", "cldemote", NULL, "movdiri",
- "movdir64b", NULL, NULL, "pks",
+ "movdir64b", NULL, "sgxlc", "pks",
},
.cpuid = {
.eax = 7,
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index c2954c71ea..b6491df0f5 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -389,9 +389,17 @@ typedef enum X86Seg {
#define MSR_IA32_PKRS 0x6e1
#define FEATURE_CONTROL_LOCKED (1<<0)
+#define FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX (1ULL << 1)
#define FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX (1<<2)
+#define FEATURE_CONTROL_SGX_LC (1ULL << 17)
+#define FEATURE_CONTROL_SGX (1ULL << 18)
#define FEATURE_CONTROL_LMCE (1<<20)
+#define MSR_IA32_SGXLEPUBKEYHASH0 0x8c
+#define MSR_IA32_SGXLEPUBKEYHASH1 0x8d
+#define MSR_IA32_SGXLEPUBKEYHASH2 0x8e
+#define MSR_IA32_SGXLEPUBKEYHASH3 0x8f
+
#define MSR_P6_PERFCTR0 0xc1
#define MSR_IA32_SMBASE 0x9e
@@ -718,6 +726,8 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS];
/* Support RDFSBASE/RDGSBASE/WRFSBASE/WRGSBASE */
#define CPUID_7_0_EBX_FSGSBASE (1U << 0)
+/* Support SGX */
+#define CPUID_7_0_EBX_SGX (1U << 2)
/* 1st Group of Advanced Bit Manipulation Extensions */
#define CPUID_7_0_EBX_BMI1 (1U << 3)
/* Hardware Lock Elision */
@@ -805,6 +815,8 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS];
#define CPUID_7_0_ECX_MOVDIRI (1U << 27)
/* Move 64 Bytes as Direct Store Instruction */
#define CPUID_7_0_ECX_MOVDIR64B (1U << 28)
+/* Support SGX Launch Control */
+#define CPUID_7_0_ECX_SGX_LC (1U << 30)
/* Protection Keys for Supervisor-mode Pages */
#define CPUID_7_0_ECX_PKS (1U << 31)
--
2.31.1
- [PULL 00/33] x86 and misc changes for 2021-09-28, Paolo Bonzini, 2021/09/28
- [PULL 04/33] qom: Add memory-backend-epc ObjectOptions support, Paolo Bonzini, 2021/09/28
- [PULL 08/33] i386: Add SGX CPUID leaf FEAT_SGX_12_0_EAX, Paolo Bonzini, 2021/09/28
- [PULL 06/33] vl: Add sgx compound properties to expose SGX EPC sections to guest, Paolo Bonzini, 2021/09/28
- [PULL 07/33] i386: Add primary SGX CPUID and MSR defines,
Paolo Bonzini <=
- [PULL 01/33] memory: Add RAM_PROTECTED flag to skip IOMMU mappings, Paolo Bonzini, 2021/09/28
- [PULL 09/33] i386: Add SGX CPUID leaf FEAT_SGX_12_0_EBX, Paolo Bonzini, 2021/09/28
- [PULL 14/33] i386: kvm: Add support for exposing PROVISIONKEY to guest, Paolo Bonzini, 2021/09/28
- [PULL 10/33] i386: Add SGX CPUID leaf FEAT_SGX_12_1_EAX, Paolo Bonzini, 2021/09/28
- [PULL 12/33] i386: Add feature control MSR dependency when SGX is enabled, Paolo Bonzini, 2021/09/28
- [PULL 13/33] i386: Update SGX CPUID info according to hardware/KVM/user input, Paolo Bonzini, 2021/09/28
- [PULL 11/33] i386: Add get/set/migrate support for SGX_LEPUBKEYHASH MSRs, Paolo Bonzini, 2021/09/28
- [PULL 16/33] Adjust min CPUID level to 0x12 when SGX is enabled, Paolo Bonzini, 2021/09/28
- [PULL 22/33] i440fx: Add support for SGX EPC, Paolo Bonzini, 2021/09/28
- [PULL 26/33] target/i386: Add the query-sgx-capabilities QMP command, Paolo Bonzini, 2021/09/28