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[PULL 10/33] i386: Add SGX CPUID leaf FEAT_SGX_12_1_EAX
From: |
Paolo Bonzini |
Subject: |
[PULL 10/33] i386: Add SGX CPUID leaf FEAT_SGX_12_1_EAX |
Date: |
Tue, 28 Sep 2021 14:50:53 +0200 |
From: Sean Christopherson <sean.j.christopherson@intel.com>
CPUID leaf 12_1_EAX is an Intel-defined feature bits leaf enumerating
the platform's SGX capabilities that may be utilized by an enclave, e.g.
whether or not an enclave can gain access to the provision key.
Currently there are six capabilities:
- INIT: set when the enclave has has been initialized by EINIT. Cannot
be set by software, i.e. forced to zero in CPUID.
- DEBUG: permits a debugger to read/write into the enclave.
- MODE64BIT: the enclave runs in 64-bit mode
- PROVISIONKEY: grants has access to the provision key
- EINITTOKENKEY: grants access to the EINIT token key, i.e. the
enclave can generate EINIT tokens
- KSS: Key Separation and Sharing enabled for the enclave.
Note that the entirety of CPUID.0x12.0x1, i.e. all registers, enumerates
the allowed ATTRIBUTES (128 bits), but only bits 31:0 are directly
exposed to the user (via FEAT_12_1_EAX). Bits 63:32 are currently all
reserved and bits 127:64 correspond to the allowed XSAVE Feature Request
Mask, which is calculated based on other CPU features, e.g. XSAVE, MPX,
AVX, etc... and is not exposed to the user.
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Yang Zhong <yang.zhong@intel.com>
Message-Id: <20210719112136.57018-10-yang.zhong@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/cpu.c | 21 +++++++++++++++++++++
target/i386/cpu.h | 1 +
2 files changed, 22 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index c0d5c3c621..e9ecbf59e5 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -656,6 +656,7 @@ void x86_cpu_vendor_words2str(char *dst, uint32_t vendor1,
#define TCG_14_0_ECX_FEATURES 0
#define TCG_SGX_12_0_EAX_FEATURES 0
#define TCG_SGX_12_0_EBX_FEATURES 0
+#define TCG_SGX_12_1_EAX_FEATURES 0
FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
[FEAT_1_EDX] = {
@@ -1223,6 +1224,26 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
},
.tcg_features = TCG_SGX_12_0_EBX_FEATURES,
},
+
+ [FEAT_SGX_12_1_EAX] = {
+ .type = CPUID_FEATURE_WORD,
+ .feat_names = {
+ NULL, "sgx-debug", "sgx-mode64", NULL,
+ "sgx-provisionkey", "sgx-tokenkey", NULL, "sgx-kss",
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ },
+ .cpuid = {
+ .eax = 0x12,
+ .needs_ecx = true, .ecx = 1,
+ .reg = R_EAX,
+ },
+ .tcg_features = TCG_SGX_12_1_EAX_FEATURES,
+ },
};
typedef struct FeatureMask {
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index e66ec85980..85a9eeeb2b 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -580,6 +580,7 @@ typedef enum FeatureWord {
FEAT_14_0_ECX,
FEAT_SGX_12_0_EAX, /* CPUID[EAX=0x12,ECX=0].EAX (SGX) */
FEAT_SGX_12_0_EBX, /* CPUID[EAX=0x12,ECX=0].EBX (SGX MISCSELECT[31:0]) */
+ FEAT_SGX_12_1_EAX, /* CPUID[EAX=0x12,ECX=1].EAX (SGX ATTRIBUTES[31:0]) */
FEATURE_WORDS,
} FeatureWord;
--
2.31.1
- [PULL 00/33] x86 and misc changes for 2021-09-28, Paolo Bonzini, 2021/09/28
- [PULL 04/33] qom: Add memory-backend-epc ObjectOptions support, Paolo Bonzini, 2021/09/28
- [PULL 08/33] i386: Add SGX CPUID leaf FEAT_SGX_12_0_EAX, Paolo Bonzini, 2021/09/28
- [PULL 06/33] vl: Add sgx compound properties to expose SGX EPC sections to guest, Paolo Bonzini, 2021/09/28
- [PULL 07/33] i386: Add primary SGX CPUID and MSR defines, Paolo Bonzini, 2021/09/28
- [PULL 01/33] memory: Add RAM_PROTECTED flag to skip IOMMU mappings, Paolo Bonzini, 2021/09/28
- [PULL 09/33] i386: Add SGX CPUID leaf FEAT_SGX_12_0_EBX, Paolo Bonzini, 2021/09/28
- [PULL 14/33] i386: kvm: Add support for exposing PROVISIONKEY to guest, Paolo Bonzini, 2021/09/28
- [PULL 10/33] i386: Add SGX CPUID leaf FEAT_SGX_12_1_EAX,
Paolo Bonzini <=
- [PULL 12/33] i386: Add feature control MSR dependency when SGX is enabled, Paolo Bonzini, 2021/09/28
- [PULL 13/33] i386: Update SGX CPUID info according to hardware/KVM/user input, Paolo Bonzini, 2021/09/28
- [PULL 11/33] i386: Add get/set/migrate support for SGX_LEPUBKEYHASH MSRs, Paolo Bonzini, 2021/09/28
- [PULL 16/33] Adjust min CPUID level to 0x12 when SGX is enabled, Paolo Bonzini, 2021/09/28
- [PULL 22/33] i440fx: Add support for SGX EPC, Paolo Bonzini, 2021/09/28
- [PULL 26/33] target/i386: Add the query-sgx-capabilities QMP command, Paolo Bonzini, 2021/09/28
- [PULL 31/33] memory: Add tracepoint for dirty sync, Paolo Bonzini, 2021/09/28
- [PULL 28/33] tests: qtest: bios-tables-test depends on the unpacked edk2 ROMs, Paolo Bonzini, 2021/09/28
- [PULL 33/33] meson_options.txt: Switch the default value for the vnc option to 'auto', Paolo Bonzini, 2021/09/28
- [PULL 02/33] Kconfig: Add CONFIG_SGX support, Paolo Bonzini, 2021/09/28